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公开(公告)号：US20140013151A1
公开(公告)日：2014-01-09
申请号：US13541750
申请日：2012-07-04
CPC分类号： G06F13/4282
摘要： In accordance with one embodiment of the invention, an I2C bus multiplexing circuit for use in an I2C bus interface can be provided. The I2C bus multiplexing circuit can facilitate multiplexer switching in an I2C bus interface by detecting a start command from an I2C master device via an I2C bus, buffering data from the I2C master device, detecting a clock frequency of a bus serial clock (SCL) line of the I2C master device, holding the serial data (SDA) line of the I2C master device in a clock stretch state and selecting a port based on the detected clock frequency of the SCL of the I2C master device. The method further can include sending the buffered data to an I2C slave device on the selected port. The method further can include receiving an acknowledgement from the I2C slave device on the selected port.
摘要翻译： 根据本发明的一个实施例，可以提供用于I2C总线接口的I2C总线复用电路。 I2C总线复用电路可以通过I2C总线从I2C主器件检测启动命令，缓冲来自I2C主器件的数据，检测总线串行时钟（SCL）线的时钟频率，从而有助于I2C总线接口中的多路开关切换 的I2C主器件，将I2C主器件的串行数据（SDA）线保持在时钟拉伸状态，并根据检测到的I2C主器件SCL的时钟频率选择一个端口。 该方法还可以包括将所缓冲的数据发送到所选端口上的I2C从设备。 该方法还可以包括从所选端口上的I2C从设备接收确认。
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2.发明授权Inter-integrated circuit (I2C) multiplexer switching as a function of clock frequency 有权集成电路（I2C）多路开关作为时钟频率的函数公开(公告)号：US08909844B2
公开(公告)日：2014-12-09
申请号：US13541750
申请日：2012-07-04
IPC分类号： G06F13/00
CPC分类号： G06F13/4282
摘要： In accordance with one embodiment of the invention, an I2C bus multiplexing circuit for use in an I2C bus interface can be provided. The I2C bus multiplexing circuit can facilitate multiplexer switching in an I2C bus interface by detecting a start command from an I2C master device via an I2C bus, buffering data from the I2C master device, detecting a clock frequency of a bus serial clock (SCL) line of the I2C master device, holding the serial data (SDA) line of the I2C master device in a clock stretch state and selecting a port based on the detected clock frequency of the SCL of the I2C master device. The method further can include sending the buffered data to an I2C slave device on the selected port. The method further can include receiving an acknowledgement from the I2C slave device on the selected port.
摘要翻译： 根据本发明的一个实施例，可以提供用于I2C总线接口的I2C总线复用电路。 I2C总线复用电路可以通过I2C总线从I2C主器件检测启动命令，缓冲来自I2C主器件的数据，检测总线串行时钟（SCL）线的时钟频率，从而有助于I2C总线接口中的多路开关切换 的I2C主器件，将I2C主器件的串行数据（SDA）线保持在时钟拉伸状态，并根据检测到的I2C主器件SCL的时钟频率选择一个端口。 该方法还可以包括将所缓冲的数据发送到所选端口上的I2C从设备。 该方法还可以包括从所选端口上的I2C从设备接收确认。
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公开(公告)号：US20140031971A1
公开(公告)日：2014-01-30
申请号：US13557357
申请日：2012-07-25
IPC分类号： G06F7/00
CPC分类号： G11B15/68
摘要： A method uses scales onboard a lift apparatus to weigh an uninstalled component that is positioned on the lift apparatus for installation into a rack. Data is accessed that identifies the weight and rack location of components currently installed in the rack, and one or more available rack locations are identified where the component may be installed without violating one or more predetermined rack stability rules. The method then uses the lift apparatus to raise the component into a selected one of the one or more available rack locations. The components are preferably information technology components, such as servers, network switches and power distribution units.
摘要翻译： 一种方法使用升降机装置上的刻度来称重位于升降机装置上的用于安装到机架中的卸载部件。 访问数据，其识别当前安装在机架中的部件的重量和机架位置，并且识别可以安装部件的一个或多个可用的机架位置，而不违反一个或多个预定的机架稳定性规则。 该方法然后使用提升装置将部件升高成一个或多个可用的机架位置中的选定的一个。 这些组件优选地是诸如服务器，网络交换机和配电单元之类的信息技术组件。
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4.发明授权公开(公告)号：US08954634B2
公开(公告)日：2015-02-10
申请号：US13530245
申请日：2012-06-22
IPC分类号： G06F3/00
CPC分类号： G06F13/4291
摘要： Operating a demultiplexer on an I2C bus, the demultiplexer including a set of input signal lines from an I2C master and a plurality of sets of output signal lines, the demultiplexer configured to couple the inputs among the output in dependence upon a demultiplexer select signal line that couples the demultiplexer to a rise time detection circuit, where the rise time detection circuit is also coupled to the input signal lines and the rise time detection circuit: monitors a voltage of at least one of the input signal lines, including: receiving, from the I2C master, a signal on one of the lines; and detecting rise time of the signal; and if the rise time of the signal is less than a predefined threshold, configuring the demultiplexer to vary the coupling of the input signal lines from a first set of outputs to a second set.
摘要翻译： 在I2C总线上操作解复用器，解复用器包括来自I2C主机和多组输出信号线的一组输入信号线，该多路分配器被配置为根据解复用器选择信号线在输出之间耦合输入 将解复用器耦合到上升时间检测电路，其中上升时间检测电路还耦合到输入信号线和上升时间检测电路：监视至少一个输入信号线的电压，包括：从 I2C主机，其中一条信号; 并检测信号的上升时间; 并且如果信号的上升时间小于预定阈值，则配置解复用器以改变输入信号线与第一组输出到第二组的耦合。
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公开(公告)号：US08898358B2
公开(公告)日：2014-11-25
申请号：US13541749
申请日：2012-07-04
CPC分类号： G06F13/385 , G06F13/4027 , G06F13/4282
摘要： A method, device and computer program product for providing multi-protocol communication on an inter-integrated circuit (I2C) bus. The method for providing multi-protocol communication on an inter-integrated circuit (I2C) bus can include issuing a start command by a bus management device onto the I2C bus. Thereafter, the bus management device can send an embedded differential protocol to a non-I2C device. Once communication with the non-I2C device is completed, the bus management device can issue a stop command to release the I2C bus. In one aspect of this embodiment, the method can include receiving a response from the non-I2C device.
摘要翻译： 一种用于在集成电路（I2C）总线上提供多协议通信的方法，设备和计算机程序产品。 在集成电路（I2C）总线上提供多协议通信的方法可以包括由总线管理装置向I2C总线发出启动命令。 此后，总线管理装置可以向非I2C设备发送嵌入式差分协议。 一旦与非I2C设备的通信完成，总线管理设备就可以发出停止命令来释放I2C总线。 在该实施例的一个方面，该方法可以包括从非I2C设备接收响应。
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公开(公告)号：US08831772B2
公开(公告)日：2014-09-09
申请号：US13557357
申请日：2012-07-25
CPC分类号： G11B15/68
摘要： A method uses scales onboard a lift apparatus to weigh an uninstalled component that is positioned on the lift apparatus for installation into a rack. Data is accessed that identifies the weight and rack location of components currently installed in the rack, and one or more available rack locations are identified where the component may be installed without violating one or more predetermined rack stability rules. The method then uses the lift apparatus to raise the component into a selected one of the one or more available rack locations. The components are preferably information technology components, such as servers, network switches and power distribution units.
摘要翻译： 一种方法使用升降机装置上的刻度来称重位于升降机装置上的用于安装到机架中的卸载部件。 访问数据，其识别当前安装在机架中的部件的重量和机架位置，并且识别可以安装部件的一个或多个可用的机架位置，而不违反一个或多个预定的机架稳定性规则。 该方法然后使用提升装置将部件升高成一个或多个可用的机架位置中的选定的一个。 这些组件优选地是诸如服务器，网络交换机和配电单元之类的信息技术组件。
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7.发明申请Detecting Data Transmission Errors In An Inter-Integrated Circuit ('I2C') System 有权检测内部集成电路（“I2C”）系统中的数据传输错误公开(公告)号：US20130346835A1
公开(公告)日：2013-12-26
申请号：US13530318
申请日：2012-06-22
CPC分类号： H03M13/098 , H04L2001/0094
摘要： Detecting data transmission errors in an I2C system that includes a source device, an destination device, and a signal line coupling the I2C source and destination device, including: receiving, by the I2C destination device from the I2C source device, a data transmission signal, the data transmission signal encoded with a set of bits; detecting, by the I2C destination device, rise time of a preselected bit in the set of bits; if the detected rise time is less than a predefined threshold, determining that the I2C source device injected a parity bit in the signal, and if the detected rise time is not less than the predefined threshold, determining that the I2C source device did not inject a parity bit in the signal; and determining whether the data transmission signal includes an error in dependence upon the parity of the set of bits.
摘要翻译： 检测I2C系统中的数据传输错误，该系统包括源设备，目标设备和耦合I2C源设备和目标设备的信号线，包括：由I2C源设备从I2C源设备接收数据传输信号， 数据传输信号用一组位编码; 通过I2C目的地设备检测位组中的预选位的上升时间; 如果检测到的上升时间小于预定阈值，则确定I2C源设备在信号中注入了奇偶校验位，并且如果检测到的上升时间不小于预定阈值，则确定I2C源设备未注入 信号中的奇偶校验位; 以及确定所述数据传输信号是否包括与所述位组的奇偶校验有关的错误。
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8.发明申请公开(公告)号：US20130343197A1
公开(公告)日：2013-12-26
申请号：US13530245
申请日：2012-06-22
IPC分类号： H04L12/26
CPC分类号： G06F13/4291
摘要： Operating a demultiplexer on an I2C bus, the demultiplexer including a set of input signal lines from an I2C master and a plurality of sets of output signal lines, the demultiplexer configured to couple the inputs among the output in dependence upon a demultiplexer select signal line that couples the demultiplexer to a rise time detection circuit, where the rise time detection circuit is also coupled to the input signal lines and the rise time detection circuit: monitors a voltage of at least one of the input signal lines, including: receiving, from the I2C master, a signal on one of the lines; and detecting rise time of the signal; and if the rise time of the signal is less than a predefined threshold, configuring the demultiplexer to vary the coupling of the input signal lines from a first set of outputs to a second set.
摘要翻译： 在I2C总线上操作解复用器，解复用器包括来自I2C主机和多组输出信号线的一组输入信号线，该多路分配器被配置为根据解复用器选择信号线在输出之间耦合输入 将解复用器耦合到上升时间检测电路，其中上升时间检测电路还耦合到输入信号线和上升时间检测电路：监视至少一个输入信号线的电压，包括：从 I2C主机，其中一条信号; 并检测信号的上升时间; 并且如果信号的上升时间小于预定阈值，则配置解复用器以改变输入信号线与第一组输出到第二组的耦合。
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9.发明授权Chip select (‘CS’) multiplication in a serial peripheral interface (‘SPI’) system 有权串行外设接口（“SPI”）系统中的片选（'CS'）相乘公开(公告)号：US09015394B2
公开(公告)日：2015-04-21
申请号：US13530284
申请日：2012-06-22
CPC分类号： G06F13/4291 , G06F1/3215 , G06F11/349 , G06F13/4282 , H03M1/34
摘要： Chip select (‘CS’) multiplication in an SPI system that includes an SPI master, a CS multiplier, a plurality of SPI slaves, and a fall time detection circuit, where the SPI master is coupled to the CS multiplier and the fall time detection circuit by a CS signal line, the CS multiplier includes a plurality of CS outputs with each CS output coupled to an SPI slave, and CS multiplication includes: receiving, from the SPI master, the CS signal on the CS signal line; detecting fall time of the CS signal; and, if the fall time of the CS signal is less than a predefined threshold, configuring, by the fall-time detection circuit, the CS multiplier to vary from providing a CS signal on a first CS output to providing a CS signal on a second CS output.
摘要翻译： 包括SPI主机，CS乘法器，多个SPI从机以及下降时间检测电路的SPI系统中的片选（'CS'）相乘，其中SPI主机耦合到CS乘法器和下降时间检测 CS乘法器包括多个CS输出，每个CS输出耦合到SPI从机，CS乘法包括：从SPI主机接收CS信号线上的CS信号; 检测CS信号的下降时间; 并且如果CS信号的下降时间小于预定阈值，则由下降时间检测电路配置CS乘法器，以便在第一CS输出上提供CS信号以在第二CS输出上提供CS信号 CS输出。
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公开(公告)号：US08767370B2
公开(公告)日：2014-07-01
申请号：US13557418
申请日：2012-07-25
CPC分类号： H02H9/005 , H02H1/04 , H02H3/08 , H04L25/03878
摘要： Providing noise protection in a signal transmission system that includes a first component, second component, controller, switch, and pre-charged capacitor, the first and second components coupled by a signal line, the controller coupled to the switch, the switch configured to couple the signal line to the capacitor when activated, where providing noise protection includes: determining, by the controller, that a signal transmitted on the signal line transitioned to a steady state voltage; enabling, by the controller responsive to determining that the signal transitioned to the steady state voltage, noise protection to the signal on the signal line including activating the switch thereby coupling the signal line to the pre-charged capacitor, the pre-charged capacitor providing noise protection to the signal on the signal line; and prior to the signal on the signal line transitioning from the steady state voltage, deactivating the switch, thereby decoupling the signal line from the pre-charged capacitor.
摘要翻译： 在包括第一组件，第二组件，控制器，开关和预充电电容器的信号传输系统中提供噪声保护，所述第一和第二组件通过信号线耦合，所述控制器耦合到所述开关，所述开关被配置为耦合 当激活时到电容器的信号线，其中提供噪声保护包括：由控制器确定在信号线上传输的信号转变为稳态电压; 所述控制器响应于确定所述信号转换到所述稳态电压，对所述信号线上的信号进行噪声保护，包括启动所述开关，从而将所述信号线耦合到所述预充电电容器，所述预充电电容器提供噪声 保护信号线上的信号; 并且在信号线上的信号从稳态电压转变之前，停用开关，从而使信号线与预充电电容器分离。
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