公开(公告)号：US06243787B1

公开(公告)日：2001-06-05

申请号：US09559352

申请日：2000-04-27

申请人： Michael Kagan ,  Diego Crupnicoff ,  Freddy Gabbay ,  Shimon Rottenberg

发明人： Michael Kagan ,  Diego Crupnicoff ,  Freddy Gabbay ,  Shimon Rottenberg

IPC分类号： G06F946

CPC分类号： H04L12/2854

摘要： A method and apparatus for conveying data over a packet-switching network. Data are received from a peripheral device for transmission via the network to a memory associated with a central processing unit (CPU), followed by an interrupt signal from the peripheral device associated with the data. One or more data packets containing the data are sent over the network to a host network interface serving the memory and the CPU, followed by an interrupt packet sent over the network to the host network interface. Responsive to the interrupt packet, an interrupt input of the CPU is asserted only after the one or more data packets have arrived at the host network interface.

摘要翻译： 一种用于通过分组交换网络传送数据的方法和装置。 从外围设备接收数据以经由网络传输到与中央处理单元（CPU）相关联的存储器，随后来自与数据相关联的外围设备的中断信号。 包含数据的一个或多个数据包通过网络发送到服务于存储器和CPU的主机网络接口，随后是通过网络发送到主机网络接口的中断包。 响应于中断包，只有在一个或多个数据包到达主机网络接口之后，才会断言CPU的中断输入。

公开(公告)号：US06978331B1

公开(公告)日：2005-12-20

申请号：US10070594

申请日：2000-09-07

申请人： Michael Kagan ,  Diego Crupnicoff ,  Freddy Gabbay ,  Shimon Rottenberg

发明人： Michael Kagan ,  Diego Crupnicoff ,  Freddy Gabbay ,  Shimon Rottenberg

IPC分类号： H04L1/00 ,  H04L12/24 ,  H04L12/40 ,  H04L12/46 ,  H04L12/56 ,  H04L12/66 ,  G06F13/00

CPC分类号： H04L12/66 ,  H04L1/0063 ,  H04L12/4604 ,  H04L12/4625 ,  H04L41/0213 ,  H04L41/06 ,  H04L2001/0092

摘要： A method and apparatus for conveying data over a packet-switching network (26). Data are received from a peripheral device (25) for transmission via the network to a memory (22) associated with a central processing unit (CPU) (21), followed by an interrupt signal from the peripheral device associated with the data. One or more data packets containing the data are sent over the network to a host network interface (32) serving the memory and the CPU, followed by an interrupt packet sent over the network to the host network interface. Responsive to the interrupt packet, an interrupt input of the CPU is asserted only after the one or more data packets have arrived at the host network interface.

摘要翻译： 一种用于通过分组交换网络（26）传送数据的方法和装置。 数据从外围设备（25）接收，用于经由网络传输到与中央处理单元（CPU）（21）相关联的存储器（22），随后是来自与数据相关联的外围设备的中断信号。 包含数据的一个或多个数据包通过网络发送到服务于存储器和CPU的主机网络接口（32），随后是通过网络发送到主机网络接口的中断包。 响应于中断包，只有在一个或多个数据包到达主机网络接口之后，才会断言CPU的中断输入。

公开(公告)号：US06438130B1

公开(公告)日：2002-08-20

申请号：US09892852

申请日：2001-06-28

申请人： Michael Kagan ,  Freddy Gabbay ,  Alon Webman ,  Diego Crupnicoff

发明人： Michael Kagan ,  Freddy Gabbay ,  Alon Webman ,  Diego Crupnicoff

IPC分类号： H04L1228

CPC分类号： H04L49/351

摘要： A device for switching packets in a network includes a switching core and a plurality of ports, coupled to pass the packets from one to another through the switching core. The ports include, with respect to each packet among the packets switched by the device, a receiving port, coupled to receive the packet from a packet source, and a destination port, to which the packet is passed for conveyance to a packet destination. The ports also include one or more cache memories, respectively associated with one or more of the ports, each of the cache memories being configured to hold a forwarding database cache for reference by the receiving port with which the cache memory is associated in determining the destination port of the packet.

摘要翻译： 用于在网络中切换分组的设备包括交换核心和多个端口，其被耦合以通过交换核心从一个到另一个传递分组。 对于由设备切换的分组中的每个分组，端口包括耦合以从分组源接收分组的接收端口和目的地端口，分组被传递到目的地端口以传送到分组目的地。 这些端口还包括分别与一个或多个端口相关联的一个或多个高速缓存存储器，每个高速缓存存储器被配置为保持转发数据库高速缓存以供高速缓冲存储器与其确定目的地所关联的接收端口相关联 端口的数据包。

公开(公告)号：US06922408B2

公开(公告)日：2005-07-26

申请号：US09758029

申请日：2001-01-10

申请人： Noam Bloch ,  Freddy Gabbay ,  Michael Kagan ,  Alon Webman ,  Diego Crupnicoff

发明人： Noam Bloch ,  Freddy Gabbay ,  Michael Kagan ,  Alon Webman ,  Diego Crupnicoff

IPC分类号： H04L1/00 ,  H04L12/24 ,  H04L12/40 ,  H04L12/46 ,  H04L12/56 ,  H04L12/66 ,  H04L12/28

CPC分类号： H04L12/66 ,  H04L12/4604 ,  H04L41/0213 ,  H04L41/06 ,  H04L47/10 ,  H04L47/30 ,  H04L47/39

摘要： A method for link-level flow control includes establishing a plurality of logical links over a physical link between a transmitting entity and a receiving entity in a network. Respective maximum limits of transmission credits are assigned to the logical links, the credits corresponding to space available to the links in a dynamically allocable portion of a receive buffer at the receiving entity, such that a sum of the maximum limits for all of the logical links corresponds to an amount of space substantially larger than a total volume of the space in the dynamically allocable portion of the receive buffer. Responsive to traffic from the transmitting entity to the receiving entity on a given one of the logical links, one or more of the credits are allocated to the given logical link when it is determined that a total of the credits allocated to the given logical link is no greater than the respective maximum limit, and that a total of the credits allocated to all of the logical links together corresponds to an allocated volume that is no greater than the total volume of the space in the dynamically allocable portion of the receive buffer. Transmission of data over the given logical link is controlled responsive to the allocated credits.

摘要翻译： 用于链路级流量控制的方法包括通过网络中的发送实体和接收实体之间的物理链路建立多个逻辑链路。 传输信用的最大限制被分配给逻辑链路，该信用对应于在接收实体处的接收缓冲器的动态可分配部分中的链路可用的空间，使得所有逻辑链路的最大限制的和 对应于基本上大于接收缓冲器的动态可分配部分中的空间的总体积的空间量。 响应于在给定的一个逻辑链路上从发送实体到接收实体的业务，当确定分配给给定逻辑链路的信用的总和是一个或多个信用被分配给给定的逻辑链路 不大于相应的最大限制，并且分配给所有逻辑链路的信用总数一起对应于不大于接收缓冲器的动态可分配部分中的空间的总体积的分配的卷。 通过给定的逻辑链路的数据传输是根据分配的信用来控制的。

公开(公告)号：US08255475B2

公开(公告)日：2012-08-28

申请号：US12430912

申请日：2009-04-28

申请人： Michael Kagan ,  Diego Crupnicoff ,  Dror Goldenberg ,  Liran Liss

发明人： Michael Kagan ,  Diego Crupnicoff ,  Dror Goldenberg ,  Liran Liss

IPC分类号： G06F15/167

CPC分类号： G06F12/1072 ,  G06F12/145

摘要： An input/output (I/O) device includes a host interface for connection to a host device having a memory and a network interface, which is configured to receive, over a network, data packets associated with I/O operations directed to specified virtual addresses in the memory. Packet processing hardware is configured to translate the virtual addresses into physical addresses and to perform the I/O operations using the physical addresses, and upon an occurrence of a page fault in translating one of the virtual addresses, to transmit a response packet over the network to a source of the data packets so as to cause the source to refrain from transmitting further data packets while the page fault is serviced.

摘要翻译： 输入/输出（I / O）设备包括用于连接到具有存储器和网络接口的主机设备的主机接口，其被配置为通过网络接收与指向虚拟的I / O操作相关联的数据分组 地址在内存中。 分组处理硬件被配置为将虚拟地址转换为物理地址并且使用物理地址执行I / O操作，并且在翻译虚拟地址之一时出现页面故障时，通过网络发送响应分组 到数据分组的源，以便在页面故障被维护时使得源不被发送进一步的数据分组。

公开(公告)号：US08051212B2

公开(公告)日：2011-11-01

申请号：US10000456

申请日：2001-12-04

申请人： Michael Kagan ,  Diego Crupnicoff ,  Margarita Shnitman ,  Ariel Shachar ,  Ram Izhaki ,  Gilad Shainer ,  Aviram Gutman ,  Benny Koren ,  Dafna Levenvirth ,  Gil Bloch ,  Yael Shenhav

发明人： Michael Kagan ,  Diego Crupnicoff ,  Margarita Shnitman ,  Ariel Shachar ,  Ram Izhaki ,  Gilad Shainer ,  Aviram Gutman ,  Benny Koren ,  Dafna Levenvirth ,  Gil Bloch ,  Yael Shenhav

IPC分类号： G06F15/16

CPC分类号： G06F13/1605 ,  H04L49/90

摘要： A network interface adapter includes an outgoing packet generator, adapted to generate an outgoing request packet for delivery to a remote responder responsive to a request submitted by a host processor and a network output port, coupled to transmit the outgoing request packet over a network to the remote responder. A network input port receives an incoming response packet from the remote responder, in response to the outgoing request packet sent thereto, as well as an incoming request packet sent by a remote requester. An incoming packet processor receives and processes both the incoming response packet and the incoming request packet, and causes the outgoing packet generator, responsive to the incoming request packet, to generate, in addition to the outgoing request packet, an outgoing response packet for transmission to the remote requester.

摘要翻译： 网络接口适配器包括输出分组生成器，其适于响应于由主处理器和网络输出端口提交的请求而生成用于传送到远程响应者的输出请求分组，所述请求被耦合以通过网络将所述输出请求分组传送到 远程响应者。 网络输入端口响应于向其发送的传出请求分组以及由远程请求者发送的传入请求分组，从远程应答器接收传入响应分组。 输入分组处理器接收并处理输入响应分组和传入请求分组，并且响应于传入请求分组使输出分组生成器除了输出请求分组之外还生成用于传输的输出响应分组 远程请求者。

公开(公告)号：US07676597B2

公开(公告)日：2010-03-09

申请号：US10052435

申请日：2002-01-23

申请人： Michael Kagan ,  Diego Crupnicoff ,  Margarita Shnitman ,  Ariel Shachar ,  Dafna Levenvirth ,  Gil Bloch

发明人： Michael Kagan ,  Diego Crupnicoff ,  Margarita Shnitman ,  Ariel Shachar ,  Dafna Levenvirth ,  Gil Bloch

IPC分类号： G06F15/173

CPC分类号： G06F13/1605 ,  H04L49/90

摘要： An interface adapter for a packet network includes a first plurality of execution engines, coupled to a host interface so as to read from a memory work items corresponding to messages to be sent over the network, and to generate gather entries defining packets to be transmitted over the network responsive to the work items. A scheduling processor assigns the work items to the execution engines for generation of the gather entries. Switching circuitry couples the execution engines to a plurality of gather engines, which generate the packets responsive to the gather entries.

摘要翻译： 用于分组网络的接口适配器包括第一多个执行引擎，耦合到主机接口，以从存储器中读取与通过网络发送的消息相对应的工作项，并且生成定义要发送的分组的收集条目 网络响应工作项。 调度处理器将工作项目分配给执行引擎以生成收集条目。 切换电路将执行引擎耦合到多个收集引擎，其收集响应于收集条目的分组。

公开(公告)号：US07245627B2

公开(公告)日：2007-07-17

申请号：US10127710

申请日：2002-04-23

申请人： Dror Goldenberg ,  Gil Bloch ,  Gil Stoler ,  Diego Crupnicoff ,  Michael Kagan

发明人： Dror Goldenberg ,  Gil Bloch ,  Gil Stoler ,  Diego Crupnicoff ,  Michael Kagan

IPC分类号： H04L12/56

CPC分类号： H04L47/10 ,  H04L47/125 ,  H04L49/25 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/351

摘要： A network interface device includes a fabric interface, adapted to exchange messages over a switch fabric with a plurality of host processors, the messages containing data, and a network interface, including one or more ports adapted to be coupled to a network external to the switch fabric. Message processing circuitry is coupled between the fabric interface and the network interface, so as to enable at least first and second host processors among the plurality of the host processors to use a single one of the ports substantially simultaneously so as to transmit and receive frames containing the data over the network.

摘要翻译： 网络接口设备包括：结构接口，适于通过交换结构与多个主处理器交换消息，所述消息包含数据，以及网络接口，包括一个或多个适于耦合到交换机外部的网络的端口 布。 消息处理电路耦合在结构接口和网络接口之间，以使多个主机处理器中的至少第一和第二主处理器基本上同时使用单个端口，以便发送和接收包含 网络上的数据。

公开(公告)号：US06735642B2

公开(公告)日：2004-05-11

申请号：US09870016

申请日：2001-05-31

申请人： Michael Kagan ,  Ariel Shahar ,  Diego Crupnicoff

发明人： Michael Kagan ,  Ariel Shahar ,  Diego Crupnicoff

IPC分类号： G06F1314

CPC分类号： G06F13/28 ,  G06F2213/2802

摘要： A method of direct memory access (DMA) includes receiving a first notification at a DMA engine that a first list of descriptors has been prepared, each of the descriptors in the list including an instruction for execution by the DMA engine and a link to a succeeding one of the descriptors, except for a final descriptor in the list, which has a null link. The DMA engine reads and executes the descriptors in the first list. When the DMA engine receives a second notification that a second list of the descriptors has been prepared, it rereads at least a part of the final descriptor in the first list to determine a changed value of the link, indicating a first descriptor in the second list. It then reads and executes the descriptors in the second list responsive to the changed value of the link.

摘要翻译： 直接存储器访问（DMA）的方法包括：在DMA引擎处接收第一个描述符列表的第一通知，列表中的每个描述符包括由DMA引擎执行的指令，以及到后续的 描述符之一，除了列表中的最终描述符，其具有空链接。 DMA引擎读取并执行第一个列表中的描述符。 当DMA引擎接收到已经准备好描述符的第二列表的第二通知时，它重新读取第一列表中的最终描述符的至少一部分以确定链接的改变的值，指示第二列表中的第一描述符 。 然后，它响应于链接的更改值读取并执行第二列表中的描述符。

公开(公告)号：US20130103777A1

公开(公告)日：2013-04-25

申请号：US13280457

申请日：2011-10-25

申请人： Michael Kagan ,  Diego Crupnicoff

发明人： Michael Kagan ,  Diego Crupnicoff

IPC分类号： G06F15/167

CPC分类号： H04L49/901 ,  H04L49/358 ,  H04L49/9031 ,  H04L49/9068

摘要： A method for communication includes allocating in a memory of a host device a contiguous, cyclical set of buffers for use by a transport service instance on a network interface controller (NIC). First and second indices point respectively to a first buffer in the set to which the NIC is to write and a second buffer in the set from which a client process running on the host device is to read. Upon receiving at the NIC a message directed to the transport service instance and containing data to be pushed to the memory, the data are written to the first buffer that is pointed to by the first index, and the first index is advanced cyclically through the set. The second index is advanced cyclically through the set when the data in the second buffer have been read by the client process.

摘要翻译： 一种用于通信的方法包括在主机设备的存储器中分配连续的循环缓冲器组，以供由网络接口​​控制器（NIC）上的传输服务实例使用。 第一和第二索引分别指向NIC要写入的集合中的第一个缓冲区，并且在主机设备中运行的客户端进程的集合中的第二个缓冲区将被读取。 在NIC处接收到指向传输服务实例并包含要被推送到存储器的数据的消息时，数据被写入到由第一索引指向的第一缓冲器，并且第一索引循环地前进通过该集合 。 当客户端进程读取第二个缓冲区中的数据时，第二个索引会循环进行。