公开(公告)号：US20080128675A1

公开(公告)日：2008-06-05

申请号：US11606800

申请日：2006-11-30

申请人： Michele Magistretti ,  Pietro Petruzza ,  Giovanni Mazzone ,  Fabio Pellizzer ,  Silvio Cristofalo

发明人： Michele Magistretti ,  Pietro Petruzza ,  Giovanni Mazzone ,  Fabio Pellizzer ,  Silvio Cristofalo

IPC分类号： H01L45/00

CPC分类号： H01L45/1691 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A phase change memory includes a cup-shaped heater element formed above a body. A tapered phase change region is formed on the cup-shaped heater element. The cup-shaped heater element is formed by depositing a stop layer of a first dielectric material over the body. A first sacrificial layer is deposited over the stop layer, the first sacrificial layer being of a second dielectric material that can be etched selectively with respect to the first dielectric material. An opening is etched in the first sacrificial layer and the stop layer. A heating layer is formed in the opening. The opening is filled with a filling material to obtain a structure having a cup-shaped heating region formed in the stop layer and excess portions extending over said stop layer. The excess portions by an etch selective with respect to the first dielectric material are removed.

摘要翻译： 相变存储器包括形成在主体上方的杯形加热器元件。 在杯形加热器元件上形成锥形相变区域。 杯状加热器元件通过在主体上沉积第一电介质材料的停止层而形成。 第一牺牲层沉积在停止层上，第一牺牲层是可相对于第一介电材料选择性地蚀刻的第二电介质材料。 在第一牺牲层和停止层中蚀刻开口。 在开口中形成加热层。 开口填充有填充材料，以获得形成在止挡层中的杯形加热区域和在所述停止层上延伸的多余部分的结构。 除去相对于第一介电材料选择性的蚀刻的多余部分。

公开(公告)号：US20110260332A1

公开(公告)日：2011-10-27

申请号：US13091330

申请日：2011-04-21

申请人： Antonio Di Franco ,  Silvio Cristofalo ,  Marco Bonifacio

发明人： Antonio Di Franco ,  Silvio Cristofalo ,  Marco Bonifacio

IPC分类号： H01L23/522 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311

CPC分类号： H01L21/76877 ,  H01L21/02274 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76819 ,  H01L21/76837 ,  H01L23/481 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilevel interconnect structure for a semiconductor device includes an intermetal dielectric layer with funnel-shaped connecting vias. The funnel-shaped connecting vias are provided in connection with systems exhibiting submicron spacings. The architecture of the multilevel interconnect structure provides a low resistance connecting via.

摘要翻译： 用于半导体器件的多电平互连结构包括具有漏斗形连接通孔的金属间电介质层。 漏斗形连接通孔与呈现亚微米间隔的系统相连。 多层互连结构的架构提供了低电阻连接通孔。

公开(公告)号：US08586470B2

公开(公告)日：2013-11-19

申请号：US13091330

申请日：2011-04-21

申请人： Antonio Di Franco ,  Silvio Cristofalo ,  Marco Bonifacio

发明人： Antonio Di Franco ,  Silvio Cristofalo ,  Marco Bonifacio

IPC分类号： H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/02274 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76819 ,  H01L21/76837 ,  H01L23/481 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilevel interconnect structure for a semiconductor device includes an intermetal dielectric layer with funnel-shaped connecting vias. The funnel-shaped connecting vias are provided in connection with systems exhibiting submicron spacings. The architecture of the multilevel interconnect structure provides a low resistance connecting via.