公开(公告)号：US20140136876A1

公开(公告)日：2014-05-15

申请号：US14080322

申请日：2013-11-14

Applicant: Microchip Technology Incorporated

Inventor： Sean Stacy Steedman ,  Zeke Lundstrum ,  Cristian Nicolae Groza ,  Sebastian Dan Copacian ,  Hartono DArmawaskita

IPC: G06F1/06 ,  H03K5/05

CPC classification number: G06F1/06 ,  G06F12/00 ,  G06F13/1694 ,  H03K5/05 ,  H03K5/1515 ,  H03K7/08 ,  H03L7/089 ,  H03L7/10 ,  Y02D10/14

Abstract: A complementary output generator (COG) module generates at least two complementary outputs determined by rising and falling event sources. In a simple configuration of the COG module, the rising and falling event sources are the same signal which is a signal having the desired period and duty cycle. The COG module converts this single signal input into dual complementary outputs. The frequency and duty cycle of the dual outputs substantially match those of the single input signal. Blanking and deadband times may be introduced between the complementary outputs, and the dual complementary outputs may also be phase delayed. In addition the COG module may provide up to four outputs for controlling half and full-wave bridge power applications.

Abstract translation: 互补输出发生器（COG）模块产生由上升和下降事件源确定的至少两个互补输出。 在COG模块的简单配置中，上升和下降事件源是具有期望周期和占空比的信号相同的信号。 COG模块将该单个信号输入转换为双重互补输出。 双输出的频率和占空比基本上与单输入信号的频率和占空比相匹配。 可以在互补输出之间引入消隐和死区时间，并且双互补输出也可以是相位延迟的。 此外，COG模块可以提供多达四个输出，用于控制半波和全波桥电源应用。

公开(公告)号：US09310828B2

公开(公告)日：2016-04-12

申请号：US14080322

申请日：2013-11-14

Applicant: Microchip Technology Incorporated

Inventor： Sean Stacy Steedman ,  Zeke Lundstrum ,  Cristian Nicolae Groza ,  Sebastian Dan Copacian ,  Hartono DArmawaskita

IPC: G06F1/06 ,  G06F1/12 ,  H03K5/05 ,  H03K5/151 ,  H03K7/08 ,  G06F12/00 ,  G06F13/16 ,  H03L7/089 ,  H03L7/10

CPC classification number: G06F1/06 ,  G06F12/00 ,  G06F13/1694 ,  H03K5/05 ,  H03K5/1515 ,  H03K7/08 ,  H03L7/089 ,  H03L7/10 ,  Y02D10/14

Abstract: A complementary output generator (COG) module generates at least two complementary outputs determined by rising and falling event sources. In a simple configuration of the COG module, the rising and falling event sources are the same signal which is a signal having the desired period and duty cycle. The COG module converts this single signal input into dual complementary outputs. The frequency and duty cycle of the dual outputs substantially match those of the single input signal. Blanking and deadband times may be introduced between the complementary outputs, and the dual complementary outputs may also be phase delayed. In addition the COG module may provide up to four outputs for controlling half and full-wave bridge power applications.

Abstract translation: 互补输出发生器（COG）模块产生由上升和下降事件源确定的至少两个互补输出。 在COG模块的简单配置中，上升和下降事件源是具有期望周期和占空比的信号相同的信号。 COG模块将该单个信号输入转换为双重互补输出。 双输出的频率和占空比基本上与单输入信号的频率和占空比相匹配。 可以在互补输出之间引入消隐和死区时间，并且双互补输出也可以是相位延迟的。 此外，COG模块可以提供多达四个输出，用于控制半波和全波桥电源应用。