公开(公告)号：US20240282731A1

公开(公告)日：2024-08-22

申请号：US18406068

申请日：2024-01-05

Applicant: Micron Technology, Inc.

Inventor： Bharat Bhushan ,  Wei Zhou ,  Debjit Datta ,  Chaiyanan Kulchaisit ,  Kyle K. Kirby ,  Akshay N. Singh

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/29

CPC classification number: H01L24/08 ,  H01L21/56 ,  H01L23/295 ,  H01L24/05 ,  H01L24/13 ,  H01L24/80 ,  H01L2224/02379 ,  H01L2224/05647 ,  H01L2224/05681 ,  H01L2224/08145 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A semiconductor device assembly, including a semiconductor die having a frontside surface, a first plurality of bond pads at the frontside surface and a first dielectric layer at the frontside surface; and an interface die having a frontside surface and a backside surface, the interface die including a second plurality of bond pads and a second dielectric layer disposed on the backside surface of the interface die, a third dielectric layer disposed on the frontside surface of the interface die, wherein the third dielectric layer includes a mechanically altered surface opposite the frontside surface of the interface die, and a redistribution layer disposed on the third dielectric layer and above the frontside surface of the interface die, wherein hybrid bonds are disposed between the frontside surface of the semiconductor die and the backside surface of the interface die.