公开(公告)号：US20230420025A1

公开(公告)日：2023-12-28

申请号：US17852221

申请日：2022-06-28

Applicant: Micron Technology, Inc.

Inventor： Umberto di Vincenzo ,  Ferdinando Bedeschi ,  Christian Marc Benoit Caillat

IPC: G11C11/406 ,  G11C11/4096 ,  G11C11/4074

CPC classification number: G11C11/40615 ,  G11C11/40622 ,  G11C11/4096 ,  G11C11/4074

Abstract: A system includes a memory array having pattern cells and data cells. The pattern cells are configured to store only a first logic state. The data cells are configured to store the first logic state or a second logic state. Bias circuitry is configured to apply voltages to the pattern cells and data cells. Sensing circuitry is configured to read the pattern cells. A controller is configured to apply, using the bias circuitry, first voltages to the pattern cells; determine, using the sensing circuitry, that at least a portion of the pattern cells switch; determine, based on the portion of the pattern cells that switch, to refresh a codeword; and apply, using the bias circuitry, the refresh of the codeword.

公开(公告)号：US12236992B2

公开(公告)日：2025-02-25

申请号：US17852221

申请日：2022-06-28

Applicant: Micron Technology, Inc.

Inventor： Umberto di Vincenzo ,  Ferdinando Bedeschi ,  Christian Marc Benoit Caillat

IPC: G11C11/40 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096

Abstract: A system includes a memory array having pattern cells and data cells. The pattern cells are configured to store only a first logic state. The data cells are configured to store the first logic state or a second logic state. Bias circuitry is configured to apply voltages to the pattern cells and data cells. Sensing circuitry is configured to read the pattern cells. A controller is configured to apply, using the bias circuitry, first voltages to the pattern cells; determine, using the sensing circuitry, that at least a portion of the pattern cells switch; determine, based on the portion of the pattern cells that switch, to refresh a codeword; and apply, using the bias circuitry, the refresh of the codeword.

公开(公告)号：US20230395147A1

公开(公告)日：2023-12-07

申请号：US17855483

申请日：2022-06-30

Applicant: Micron Technology, Inc.

Inventor： Umberto di Vincenzo ,  Ferdinando Bedeschi ,  Christian Marc Benoit Caillat

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2213/71

Abstract: Systems, methods, and apparatus for a memory device that uses multiple groups of pattern cells to select a voltage for reading memory cells. In one approach, a controller applies different magnitude levels of voltages to each of the groups of pattern cells. The controller determines which of the groups have pattern cells that first switch (e.g., switch at the lowest magnitude of applied voltage). Based on identifying the first group to switch, the controller selects a read voltage. The selected read voltage is used to read data cells (e.g., corresponding to a codeword).