公开(公告)号：US20190243721A1

公开(公告)日：2019-08-08

申请号：US16123512

申请日：2018-09-06

Applicant: Micron Technology, Inc.

Inventor： Eric R. Fox ,  Gary R. Van Sickle

IPC: G06F11/14 ,  G06F11/30 ,  G06F1/30 ,  G06F3/06 ,  G06F12/02

CPC classification number: G06F11/1458 ,  G06F1/30 ,  G06F3/0671 ,  G06F11/3072 ,  G06F12/0238

Abstract: Devices and techniques are disclosed herein performing a backup operation on a memory system in response to a trigger event. The memory system can comprise a processing device, a group of volatile memory cells, and a group of non-volatile memory cells. The processing device can be configured to perform internal backup operations in response to a trigger event, comprising: determining, in response to the trigger event, if the memory system is in self-refresh mode; in response to determining that the memory system is not in self-refresh mode, re-determining, after a period of time, if the memory system is in self-refresh mode without failing an internal backup operation; and in response to re-determining that the memory system is in self-refresh mode, performing the internal backup operation, comprising saving at least a portion of data stored on the group of volatile memory cells to the group of non-volatile memory cells.

公开(公告)号：US11650925B2

公开(公告)日：2023-05-16

申请号：US16717160

申请日：2019-12-17

Applicant: Micron Technology, Inc.

Inventor： Eric R. Fox ,  Nathan A. Eckel

IPC: G06F9/30 ,  G06F12/0868 ,  G06F12/06 ,  G06F9/4401 ,  G06F9/38 ,  G11C29/12 ,  G06F9/48 ,  G06F13/16 ,  G06F13/10

CPC classification number: G06F12/0868 ,  G06F9/30101 ,  G06F9/3869 ,  G06F9/4411 ,  G06F9/4806 ,  G06F12/0638 ,  G06F13/102 ,  G06F13/1689 ,  G11C29/12

Abstract: A method includes receiving a signal at a memory sub-system controller to perform an operation. The method can further include, in response to receiving the signal, enabling, by the memory sub-system controller, an interface to transfer data to or from a registering clock driver (RCD) component. The RCD component is coupled to the memory sub-system controller. The method can further include transferring the data to or from the RCD component via the interface. The method can further include, in response to the enablement of the interface being unsuccessful, transferring control of a memory device to the memory sub-system controller.

公开(公告)号：US20210182201A1

公开(公告)日：2021-06-17

申请号：US16717160

申请日：2019-12-17

Applicant: Micron Technology, Inc.

Inventor： Eric R. Fox ,  Nathan A. Eckel

IPC: G06F12/0868 ,  G06F12/06 ,  G06F9/4401 ,  G06F9/38 ,  G06F9/30 ,  G06F9/48 ,  G06F13/16 ,  G06F13/10 ,  G11C29/12

Abstract: A method includes receiving a signal at a memory sub-system controller to perform an operation. The method can further include, in response to receiving the signal, enabling, by the memory sub-system controller, an interface to transfer data to or from a registering clock driver (RCD) component. The RCD component is coupled to the memory sub-system controller. The method can further include transferring the data to or from the RCD component via the interface. The method can further include, in response to the enablement of the interface being unsuccessful, transferring control of a memory device to the memory sub-system controller.