公开(公告)号：US20240095123A1

公开(公告)日：2024-03-21

申请号：US17949655

申请日：2022-09-21

Applicant: Micron Technology, Inc.

Inventor： Leon Zlotnik ,  Eyal En Gad ,  Fan Zhou

IPC: G06F11/10 ,  G06F7/501 ,  G06F11/07

CPC classification number: G06F11/1068 ,  G06F7/501 ,  G06F11/076 ,  G06F11/0793

Abstract: A method includes determining a quantity of errors for a bit string based on a quantity of bits having a logical value of one within the bit string and writing an indication corresponding to the quantity of errors for the bit string to an array of memory cells. The method can further include determining that the quantity of errors for the bit string has reached a threshold quantity of errors and refraining from performing a subsequent operation to determine the quantity of errors for the bit string in response to determining that the quantity of errors for the bit string has reached the threshold quantity of errors.

公开(公告)号：US20250045156A1

公开(公告)日：2025-02-06

申请号：US18774652

申请日：2024-07-16

Applicant: Micron Technology, Inc.

Inventor： Leon Zlotnik ,  Fan Zhou

IPC: G06F11/10

Abstract: A decoding operation is performed by receiving a command to read a correction matrix comprising multiple bit-values from memory of a decoder. The decoding operation also includes, responsive to receipt of the command, generating, using circuitry of a decoder, a predetermined correction matrix comprising a same bit-value. The decoding operation further includes providing the predetermined correction matrix to a decision engine to perform the decoding operation.

公开(公告)号：US12164375B2

公开(公告)日：2024-12-10

申请号：US17949655

申请日：2022-09-21

Applicant: Micron Technology, Inc.

Inventor： Leon Zlotnik ,  Eyal En Gad ,  Fan Zhou

IPC: G06F11/10 ,  G06F7/501 ,  G06F11/07 ,  G11C29/44 ,  G11C29/52 ,  H03M13/11 ,  H03M13/15 ,  H03M13/29 ,  H03M13/37 ,  H03M13/45

Abstract: A method includes determining a quantity of errors for a bit string based on a quantity of bits having a logical value of one within the bit string and writing an indication corresponding to the quantity of errors for the bit string to an array of memory cells. The method can further include determining that the quantity of errors for the bit string has reached a threshold quantity of errors and refraining from performing a subsequent operation to determine the quantity of errors for the bit string in response to determining that the quantity of errors for the bit string has reached the threshold quantity of errors.

公开(公告)号：US20250086056A1

公开(公告)日：2025-03-13

申请号：US18957253

申请日：2024-11-22

Applicant: Micron Technology, Inc.

Inventor： Leon Zlotnik ,  Eyal En Gad ,  Fan Zhou

IPC: G06F11/10 ,  G06F7/501 ,  G06F11/07 ,  G11C29/44 ,  G11C29/52 ,  H03M13/11 ,  H03M13/15 ,  H03M13/29 ,  H03M13/37 ,  H03M13/45

Abstract: A method includes determining a quantity of errors for a bit string based on a quantity of bits having a logical value of one within the bit string and writing an indication corresponding to the quantity of errors for the bit string to an array of memory cells. The method can further include determining that the quantity of errors for the bit string has reached a threshold quantity of errors and refraining from performing a subsequent operation to determine the quantity of errors for the bit string in response to determining that the quantity of errors for the bit string has reached the threshold quantity of errors.