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公开(公告)号:US10748921B2
公开(公告)日:2020-08-18
申请号:US16171160
申请日:2018-10-25
Applicant: Micron Technology, Inc.
Inventor: Liu Liu , David Daycock , Rithu K. Bhonsle , Giovanni Mazzone , Narula Bilik , Jordan D. Greenlee , Minsoo Lee , Benben Li
IPC: H01L27/11582 , H01L27/11524 , H01L21/32 , H01L27/1157 , H01L21/311 , H01L27/11556
Abstract: Some embodiments include a method of forming stacked memory decks. A first deck has first memory cells arranged in first tiers disposed one atop another, and has a first channel-material pillar extending through the first tiers. An inter-deck structure is over the first deck. The inter-deck structure includes an insulative expanse, and a region extending through the insulative expanse and directly over the first channel-material pillar. The region includes an etch-stop structure. A second deck is formed over the inter-deck structure. The second deck has second memory cells arranged in second tiers disposed one atop another. An opening is formed to extend through the second tiers and to the etch-stop structure. The opening is subsequently extended through the etch-stop structure. A second channel-material pillar is formed within the opening and is coupled to the first channel-material pillar. Some embodiments include integrated assemblies.
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公开(公告)号:US20240315028A1
公开(公告)日:2024-09-19
申请号:US18604200
申请日:2024-03-13
Applicant: Micron Technology, Inc.
Inventor: Paolo Tessariol , Aaron S. Yip , Giovanni Mazzone , Matthew King
CPC classification number: H10B43/27 , G11C16/0483 , G11C16/10 , H10B41/27
Abstract: A system for manufacturing a memory device forms a memory array comprising a plurality of memory cells arranged in a plurality of memory strings along a plurality of memory array pillars, wherein respective subsets of the memory array pillars correspond to respective sub-blocks of a block of the memory array, and forms a plurality of deintegrated source segments adjacent to the memory array, wherein the source segments of the plurality of deintegrated source segments are associated with respective sub-blocks and are physically segregated from one another.
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3.
公开(公告)号:US20200350333A1
公开(公告)日:2020-11-05
申请号:US16933693
申请日:2020-07-20
Applicant: Micron Technology, Inc.
Inventor: Liu Liu , David Daycock , Rithu K. Bhonsle , Giovanni Mazzone , Narula Bilik , Jordan D. Greenlee , Minsoo Lee , Benben Li
IPC: H01L27/11582 , H01L27/11524 , H01L21/32 , H01L27/1157 , H01L21/311 , H01L27/11556
Abstract: Some embodiments include a method of forming stacked memory decks. A first deck has first memory cells arranged in first tiers disposed one atop another, and has a first channel-material pillar extending through the first tiers. An inter-deck structure is over the first deck. The inter-deck structure includes an insulative expanse, and a region extending through the insulative expanse and directly over the first channel-material pillar. The region includes an etch-stop structure. A second deck is formed over the inter-deck structure. The second deck has second memory cells arranged in second tiers disposed one atop another. An opening is formed to extend through the second tiers and to the etch-stop structure. The opening is subsequently extended through the etch-stop structure. A second channel-material pillar is formed within the opening and is coupled to the first channel-material pillar. Some embodiments include integrated assemblies.
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公开(公告)号:US11569258B2
公开(公告)日:2023-01-31
申请号:US16933693
申请日:2020-07-20
Applicant: Micron Technology, Inc.
Inventor: Liu Liu , David Daycock , Rithu K. Bhonsle , Giovanni Mazzone , Narula Bilik , Jordan D. Greenlee , Minsoo Lee , Benben Li
IPC: H01L27/11578 , H01L27/11582 , H01L27/11524 , H01L21/32 , H01L27/1157 , H01L21/311 , H01L27/11556
Abstract: Some embodiments include a method of forming stacked memory decks. A first deck has first memory cells arranged in first tiers disposed one atop another, and has a first channel-material pillar extending through the first tiers. An inter-deck structure is over the first deck. The inter-deck structure includes an insulative expanse, and a region extending through the insulative expanse and directly over the first channel-material pillar. The region includes an etch-stop structure. A second deck is formed over the inter-deck structure. The second deck has second memory cells arranged in second tiers disposed one atop another. An opening is formed to extend through the second tiers and to the etch-stop structure. The opening is subsequently extended through the etch-stop structure. A second channel-material pillar is formed within the opening and is coupled to the first channel-material pillar. Some embodiments include integrated assemblies.
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5.
公开(公告)号:US20200135751A1
公开(公告)日:2020-04-30
申请号:US16171160
申请日:2018-10-25
Applicant: Micron Technology, Inc.
Inventor: Liu Liu , David Daycock , Rithu K. Bhonsle , Giovanni Mazzone , Narula Bilik , Jordan D. Greenlee , Minsoo Lee , Benben Li
IPC: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L21/311 , H01L21/32
Abstract: Some embodiments include a method of forming stacked memory decks. A first deck has first memory cells arranged in first tiers disposed one atop another, and has a first channel-material pillar extending through the first tiers. An inter-deck structure is over the first deck. The inter-deck structure includes an insulative expanse, and a region extending through the insulative expanse and directly over the first channel-material pillar. The region includes an etch-stop structure. A second deck is formed over the inter-deck structure. The second deck has second memory cells arranged in second tiers disposed one atop another. An opening is formed to extend through the second tiers and to the etch-stop structure. The opening is subsequently extended through the etch-stop structure. A second channel-material pillar is formed within the opening and is coupled to the first channel-material pillar. Some embodiments include integrated assemblies.
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