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    Integrated Structures and Methods of Forming Integrated Structures
    2.
    发明申请
    Integrated Structures and Methods of Forming Integrated Structures 审中-公开

    公开(公告)号：US20200176471A1

    公开(公告)日：2020-06-04

    申请号：US16783981

    申请日：2020-02-06

    Applicant: Micron Technology, Inc.

    Inventor： Jie Li ,  James Mathew ,  Kunal Shrotri ,  Luan C. Tran ,  Gordon A. Haller ,  Yangda Zhang ,  Hongpeng Yu ,  Minsoo Lee

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/1157

    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.

    METHODS AND APPARATUSES INCLUDING MEMORY CELLS WITH AIR GAPS AND OTHER LOW DIELECTRIC CONSTANT MATERIALS
    6.
    发明申请
    METHODS AND APPARATUSES INCLUDING MEMORY CELLS WITH AIR GAPS AND OTHER LOW DIELECTRIC CONSTANT MATERIALS 有权
    包括具有空气GAPS和其他低介电常数材料的记忆细胞的方法和装置

    公开(公告)号：US20150348790A1

    公开(公告)日：2015-12-03

    申请号：US14825947

    申请日：2015-08-13

    Applicant: Micron Technology, Inc.

    Inventor： Minsoo Lee ,  Akira Goda

    IPC: H01L21/28 ,  H01L29/423 ,  H01L21/764

    CPC classification number: H01L21/28273 ,  H01L21/28282 ,  H01L21/764 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11582 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/7889

    Abstract: Various embodiments include methods of forming memory cells. In one embodiment, a first dielectric material and a second dielectric material are formed on a substrate. A conductive material is formed between the first dielectric material and the second dielectric material. An opening is formed through the first dielectric material, the second dielectric material, and the conductive material. The conductive material is recessed laterally from the opening to form a recessed control gate and to expose portions of the first dielectric material and the second dielectric material. Portions of a third dielectric material are formed over the exposed portions of the first dielectric material and the second dielectric material and a charge storage element is formed between the portions of the third dielectric material and adjacent to the recessed control gate. Portions of the third dielectric material are substantially removed. Additional methods, as well as apparatuses, are disclosed.

    Abstract translation: 各种实施例包括形成存储器单元的方法。 在一个实施例中，在基板上形成第一电介质材料和第二电介质材料。 在第一介电材料和第二电介质材料之间形成导电材料。 通过第一介电材料，第二介电材料和导电材料形成开口。 导电材料从开口侧向凹入以形成凹入的控制栅极并暴露第一介电材料和第二介电材料的部分。 在第一介电材料和第二介电材料的暴露部分上形成第三电介质材料的一部分，并且电荷存储元件形成在第三电介质材料的部分之间并与凹陷控制栅极相邻。 基本上去除了第三绝缘材料的部分。 公开了附加的方法以及装置。

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