公开(公告)号：US20230238046A1

公开(公告)日：2023-07-27

申请号：US17941655

申请日：2022-09-09

Applicant: Micron Technology, Inc.

Inventor： Edmund GIESKE ,  Cagdas DIRIK ,  Robert M. WALKER ,  Sujeet AYYAPUREDDI ,  Niccolo IZZO ,  Markus GEIGER ,  Yang LU ,  Ameen AKEL ,  Elliott C. COOPER-BALIS ,  Danilo CARACCIO

IPC: G11C11/406 ,  G11C29/52

CPC classification number: G11C11/40618 ,  G11C11/40611 ,  G11C29/52

Abstract: An energy-efficient and area-efficient, mitigation of errors in a memory media device that are caused by row hammer attacks and the like is described. The detection of errors is deterministically performed while maintaining, in an SRAM, a number of row access counters that is smaller than the total number of rows protected in the memory media device. The reduction of the number of required counters is achieved by aliasing a plurality of rows that are being protected to each counter. The mitigation may be implemented on a per-bank basis, per-channel basis or per-memory media device basis. The memory media device may be DRAM.