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公开(公告)号：US12293798B2
公开(公告)日：2025-05-06
申请号：US17875827
申请日：2022-07-28
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
Abstract: Disclosed herein are methods, apparatuses and systems related to adjusting operation of memory dies according to reliability measures determined in real-time. The apparatus may be configured to determine the reliability measures based on (1) initiating and completing a programming operation within respective timings following an erase operation and (2) reading the programmed data within a window from completing the programming operation.
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公开(公告)号：US20240311040A1
公开(公告)日：2024-09-19
申请号：US18586861
申请日：2024-02-26
Applicant: Micron Technology, Inc.
Inventor： Yue Wei , Dahai Tian , Meng Wei
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0676 , G06F3/0679
Abstract: A write operation initiated by a memory sub-system controller of a memory sub-system to write system metadata to one or more of a plurality of dies of the a memory sub-system is identified by a processing device. A redundancy die of a plurality of dies of the memory sub-system is identified. One or more first physical blocks of the redundancy die is identified. A first write operation to write the system metadata to the one or more first physical blocks is performed.
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公开(公告)号：US11868633B2
公开(公告)日：2024-01-09
申请号：US17395700
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0619 , G06F3/0659 , G06F3/0679
Abstract: A processing device in a memory system identifies a first set of bits associated with a translation unit of a memory device, wherein the first set of bits correspond to a page field. The processing device identifies a second set of bits associated with the translation unit of the memory device, wherein the second set of bits corresponds to a block field. The processing device determines that a value representing a page number stored in the page field satisfies a threshold criterion. Responsive to determining that the value representing the page number satisfies the threshold criterion, the processing device determines a difference between the value representing the page number and a threshold value associated with the threshold criterion plurality of block stripes on a memory device. The processing device stores a value representing the difference as a plurality of bits of the second set of bits. The processing device stores a value representing a block number stored in the block field as a plurality of bits of the first set of bits.
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公开(公告)号：US11709601B2
公开(公告)日：2023-07-25
申请号：US17407898
申请日：2021-08-20
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Meng Wei
CPC classification number: G06F3/0619 , G06F3/064 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F11/1435
Abstract: A first data item is programmed to a first set of logical units of a memory sub-system. The first set of logical units is associated with a first fault tolerant stripe. A second data item is programmed to a second set of logical units of a memory sub-system. The second set of logical units is associated with a second fault tolerant stripe. A first set of redundancy metadata corresponding to the first data item and a second set of redundancy metadata corresponding to the second data item is generated. A combined set of redundancy metadata is generated based on at least the first set of redundancy metadata and the second set of redundancy metadata. The combined set of redundancy metadata is stored at a specified memory device of the memory sub-system.
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公开(公告)号：US20230045370A1
公开(公告)日：2023-02-09
申请号：US17395700
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
IPC: G06F3/06
Abstract: A processing device in a memory system identifies a first set of bits associated with a translation unit of a memory device, wherein the first set of bits correspond to a page field. The processing device identifies a second set of bits associated with the translation unit of the memory device, wherein the second set of bits corresponds to a block field. The processing device determines that a value representing a page number stored in the page field satisfies a threshold criterion. Responsive to determining that the value representing the page number satisfies the threshold criterion, the processing device determines a difference between the value representing the page number and a threshold value associated with the threshold criterion plurality of block stripes on a memory device. The processing device stores a value representing the difference as a plurality of bits of the second set of bits. The processing device stores a value representing a block number stored in the block field as a plurality of bits of the first set of bits.
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Patent Agency Ranking
公开(公告)号：US12170115B2
公开(公告)日：2024-12-17
申请号：US17451479
申请日：2021-10-19
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
Abstract: Exemplary methods, apparatuses, and systems include erasing a portion of memory from a garbage pool in response to detecting an idle period. A request to write data to the memory is received and it is determined that a charge gain threshold has not been satisfied for the erased portion of memory. The data is written to the erased portion of memory in response to determining the charge gain threshold has not been satisfied.
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公开(公告)号：US20240345946A1
公开(公告)日：2024-10-17
申请号：US18036781
申请日：2022-09-01
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7201
Abstract: A method includes assigning a respective initial credit value to each LUN of a block stripe; performing an erase operation across the block stripe; reducing, in response to the erase operation, each respective initial credit value by a unit increment to provide a respective reduced credit value; refraining from programming to each LUN of the block stripe having a respective reduced credit value equal to zero; and programming to each LUN of the block stripe having a respective reduced credit value greater than zero.
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公开(公告)号：US20230129363A1
公开(公告)日：2023-04-27
申请号：US17275567
申请日：2020-08-07
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Meng Wei
IPC: G06F3/06
Abstract: Two or more overlay sections are copied from a non-volatile memory device of a memory sub-system to a first memory buffer residing on a first volatile memory device of a host system in communication with the memory sub-system. Each overlay section includes a respective set of executable instructions. A first overlay section is copied from the host memory buffer to a second memory buffer residing on a second volatile memory device of the memory sub-system. A first set of executable instructions included in the first overlay section residing in the second memory buffer is executed. A second overlay section is copied from the host memory buffer to the second memory buffer. A second set of executable instructions included in the second overlay section residing in the second memory buffer is executed.
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公开(公告)号：US11288198B2
公开(公告)日：2022-03-29
申请号：US15733358
申请日：2019-12-23
Applicant: Micron Technology, Inc.
Inventor： Meng Wei , Shi Bo Zhang , Tao Xiong
IPC: G06F12/0891 , G06F12/0846 , G06F12/14 , G06F12/02
Abstract: A system includes a line cache, a memory device, and a processing device to execute firmware to detect that a received event is located in an events list, wherein events stored in the events list are associated with critical functions that occur no more than once per a threshold number of days and time out after between 15 microseconds and a predetermined number of hundreds of seconds. The firmware is further to enable access to the line cache and execute a critical function associated with the received event out of an always-loaded area of the line cache.
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公开(公告)号：US20240134554A1
公开(公告)日：2024-04-25
申请号：US18541683
申请日：2023-12-15
Applicant: Micron Technology, Inc.
Inventor： Meng Wei
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0619 , G06F3/0659 , G06F3/0679
Abstract: A processing device identifies a first set of bits associated with a translation unit of a memory device, wherein the first set of bits correspond to a page field; identifies a second set of bits associated with the translation unit, wherein the second set of bits corresponds to a block field; updates a first portion of an address mapping table corresponding to the second set of bits with a value representing a difference between a value stored in the page field and a threshold value; updates a second portion of the address mapping table corresponding to the first set of bits with a value representing a block number; determines, based on the updated first portion and the updated second portion, that a swapping condition is satisfied; and performs a data access operation on a set of memory cells residing at a location corresponding to the translation unit.
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