公开(公告)号：US11705421B2

公开(公告)日：2023-07-18

申请号：US17231847

申请日：2021-04-15

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Po Chen Kuo ,  Chih Hong Wang

IPC: H01L23/00 ,  H01L23/488 ,  H01L23/532

CPC classification number: H01L24/14 ,  H01L23/488 ,  H01L23/53228

Abstract: Semiconductor devices including continuous-core connectors and associated systems and methods are disclosed herein. The continuous-core connectors each include a peripheral wall that surrounds an inner-core configured to provide an electrical path using uniform material.

公开(公告)号：US11171109B2

公开(公告)日：2021-11-09

申请号：US16578975

申请日：2019-09-23

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Yu Jen Chen ,  Po Chen Kuo ,  Shih Wei Liang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L21/768 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31

Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Electrical interconnections may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The electrical interconnections may include conductors in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device, the second semiconductor device and the substrate between the bond pads and the pad of the routing members. An encapsulant distinct from the dielectric material may cover the electrical interconnections, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.

公开(公告)号：US12062635B2

公开(公告)日：2024-08-13

申请号：US17451693

申请日：2021-10-21

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Yu Jen Chen ,  Po Chen Kuo ,  Shih Wei Liang

IPC: H01L23/12 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L24/41 ,  H01L21/563 ,  H01L21/76871 ,  H01L23/3157 ,  H01L24/09 ,  H01L24/35 ,  H01L25/0657

Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Conductors may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The conductors may be in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device and between the conductors and the second semiconductor device. An encapsulant distinct from the dielectric material may cover the conductors, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.

公开(公告)号：US20220336397A1

公开(公告)日：2022-10-20

申请号：US17231847

申请日：2021-04-15

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Po Chen Kuo ,  Chih Hong Wang

IPC: H01L23/00 ,  H01L23/488 ,  H01L23/532

Abstract: Semiconductor devices including continuous-core connectors and associated systems and methods are disclosed herein. The continuous-core connectors each include a peripheral wall that surrounds an inner-core configured to provide an electrical path using uniform material.

公开(公告)号：US20220037282A1

公开(公告)日：2022-02-03

申请号：US17451693

申请日：2021-10-21

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Yu Jen Chen ,  Po Chen Kuo ,  Shih Wei Liang

IPC: H01L23/00 ,  H01L21/768 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31

Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Conductors may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The conductors may be in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device and between the conductors and the second semiconductor device. An encapsulant distinct from the dielectric material may cover the conductors, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.

公开(公告)号：US20210091036A1

公开(公告)日：2021-03-25

申请号：US16578975

申请日：2019-09-23

Applicant: Micron Technology, Inc.

Inventor： Po Chih Yang ,  Yu Jen Chen ,  Po Chen Kuo ,  Shih Wei Liang

IPC: H01L23/00 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Electrical interconnections may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The electrical interconnections may include conductors in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device, the second semiconductor device and the substrate between the bond pads and the pad of the routing members. An encapsulant distinct from the dielectric material may cover the electrical interconnections, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.