公开(公告)号：US09444469B2

公开(公告)日：2016-09-13

申请号：US14305953

申请日：2014-06-16

Applicant: Micron Technology, Inc.

Inventor： Eric Becker ,  Brandon Roth ,  Scott Schafer

IPC: H03L7/06 ,  H03L7/081 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095 ,  G11C11/4063

CPC classification number: H03L7/0814 ,  G11C11/4063 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095

Abstract: Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to a variable delay line associated with the DLL and/or to a variable frequency oscillator associated with the PLL. An output clock phase associated with the DLL or PLL may thus be held substantially constant following a DLL initialization period. Additional embodiments are disclosed and claimed.

Abstract translation: 本文公开的装置，系统和方法可以初始化延迟锁定环（DLL）或锁相环（PLL）以实现锁定状态，然后可以启动静态操作模式。 可以通过断开与DLL或PLL相关联的反馈回路来实现静态操作，以防止与DLL相关联的可变延迟线和/或与PLL相关联的可变频率振荡器的更新。 因此，与DLL或PLL相关联的输出时钟相位可以在DLL初始化时段之后保持基本上恒定。 公开并要求保护附加实施例。

公开(公告)号：US20140292389A1

公开(公告)日：2014-10-02

申请号：US14305953

申请日：2014-06-16

Applicant: Micron Technology, Inc.

Inventor： Eric Becker ,  Brandon Roth ,  Scott Schafer

IPC: H03L7/081 ,  G11C11/4063 ,  H03L7/095 ,  H03L7/087 ,  H03L7/091

CPC classification number: H03L7/0814 ,  G11C11/4063 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095

Abstract: Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to a variable delay line associated with the DLL and/or to a variable frequency oscillator associated with the PLL. An output clock phase associated with the DLL or PLL may thus be held substantially constant following a DLL initialization period. Additional embodiments are disclosed and claimed.

Abstract translation: 本文公开的装置，系统和方法可以初始化延迟锁定环（DLL）或锁相环（PLL）以实现锁定状态，然后可以启动静态操作模式。 可以通过断开与DLL或PLL相关联的反馈回路来实现静态操作，以防止与DLL相关联的可变延迟线和/或与PLL相关联的可变频率振荡器的更新。 因此，与DLL或PLL相关联的输出时钟相位可以在DLL初始化时段之后保持基本上恒定。 公开并要求保护附加实施例。