公开(公告)号：US09064572B2

公开(公告)日：2015-06-23

申请号：US13847205

申请日：2013-03-19

Applicant: Micron Technology, Inc.

Inventor： Jun Liu ,  Wenzhou Chen

IPC: G11C11/00 ,  G11C13/00 ,  G11C8/10 ,  G11C11/56

CPC classification number: G11C13/0069 ,  G11C8/10 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0061 ,  G11C2013/009 ,  G11C2013/0092

Abstract: Methods, devices, and systems associated with multilevel phase change memory cells are described herein. One or more embodiments of the present disclosure include operating a phase change memory device by placing a phase change memory cell in a reset state and applying a selected programming pulse to the phase change memory cell in order to program the cell to one of a number of intermediate states between the reset state and a set state associated with the cell. The selected programming pulse includes an uppermost magnitude applied for a particular duration, the particular duration depending on to which one of the number of intermediate states the memory cell is to be programmed.

Abstract translation: 本文描述了与多电平相变存储器单元相关联的方法，装置和系统。 本公开的一个或多个实施例包括通过将相变存储器单元置于复位状态来操作相变存储器件，并将所选择的编程脉冲施加到相变存储器单元，以将该单元编程为多个 在复位状态和与单元相关联的设置状态之间的中间状态。 所选择的编程脉冲包括在特定持续时间内施加的最高幅度，该特定持续时间取决于存储器单元将被编程的中间状态数目中的哪一个。

公开(公告)号：US20130215668A1

公开(公告)日：2013-08-22

申请号：US13847205

申请日：2013-03-19

Applicant: Micron Technology, Inc.

Inventor： Jun Liu ,  Wenzhou Chen

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C8/10 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0061 ,  G11C2013/009 ,  G11C2013/0092

Abstract: Methods, devices, and systems associated with multilevel phase change memory cells are described herein. One or more embodiments of the present disclosure include operating a phase change memory device by placing a phase change memory cell in a reset state and applying a selected programming pulse to the phase change memory cell in order to program the cell to one of a number of intermediate states between the reset state and a set state associated with the cell. The selected programming pulse includes an uppermost magnitude applied for a particular duration, the particular duration depending on to which one of the number of intermediate states the memory cell is to be programmed.

Abstract translation: 本文描述了与多电平相变存储器单元相关联的方法，装置和系统。 本公开的一个或多个实施例包括通过将相变存储器单元置于复位状态来操作相变存储器件，并将所选择的编程脉冲施加到相变存储器单元，以将该单元编程为多个 在复位状态和与单元相关联的设置状态之间的中间状态。 所选择的编程脉冲包括在特定持续时间内施加的最高幅度，该特定持续时间取决于存储器单元将被编程的中间状态数目中的哪一个。