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公开(公告)号:US11831313B2
公开(公告)日:2023-11-28
申请号:US18046757
申请日:2022-10-14
发明人: Kushal Das , Alireza Moini , David J. Reilly
IPC分类号: H03K19/195 , H02M1/08 , G06N10/00 , G06F9/448 , G06F1/03 , G06F9/30 , G11C11/44 , H02M3/07 , H10B63/00 , H04L45/00 , H04L1/24 , H04L7/033
CPC分类号: H03K19/1958 , G06F1/0321 , G06F9/30098 , G06F9/4498 , G06N10/00 , G11C11/44 , H02M1/08 , H02M3/07 , H03K19/195 , H04L1/24 , H04L7/033 , H04L45/40 , H10B63/30
摘要: Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.
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公开(公告)号:US11509310B2
公开(公告)日:2022-11-22
申请号:US16704650
申请日:2019-12-05
发明人: Kushal Das , Alireza Moini , David J. Reilly
IPC分类号: H03K19/195 , H02M1/08 , G06N10/00 , H01L27/24 , G06F9/448 , G06F1/03 , G06F9/30 , G11C11/44 , H02M3/07
摘要: Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.
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公开(公告)号:US11838022B2
公开(公告)日:2023-12-05
申请号:US16704711
申请日:2019-12-05
发明人: Kushal Das , Alireza Moini , David J. Reilly
IPC分类号: G06N10/00 , G06F9/448 , G06F1/03 , G06F9/30 , G11C11/44 , H03K19/195 , H02M1/08 , H02M3/07 , H10B63/00
CPC分类号: H03K19/1958 , G06F1/0321 , G06F9/30098 , G06F9/4498 , G06N10/00 , G11C11/44 , H02M1/08 , H02M3/07 , H03K19/195 , H10B63/30
摘要: Systems and methods related to a cryogenic-CMOS interface for controlling qubit gates are provided. A system for controlling qubit gates includes a first device comprising a quantum device including qubit gates. The system further includes a second device comprising a control system configured to operate at the cryogenic temperature. The control system includes charge locking circuits, where each of the charge locking circuits is coupled to at least one qubit gate via an interconnect such that each of the charge locking circuits is configured to provide a voltage signal to at least one qubit gate. The control system further includes a control circuit comprising a finite state machine configured to provide at least one control signal to selectively enable at least one of the charge locking circuits and to selectively enable a provision of a voltage signal to a selected one of the charge locking circuit.
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