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12 条记录 (耗时 0.023 秒)

    INTERCONNECTING MECHANISM FOR 3D INTEGRATED CIRCUIT
    1.
    发明申请
    INTERCONNECTING MECHANISM FOR 3D INTEGRATED CIRCUIT 有权
    三维集成电路互连机制

    公开(公告)号：US20130034971A1

    公开(公告)日：2013-02-07

    申请号：US13306051

    申请日：2011-11-29

    申请人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang ,  Li-Fang Lin

    发明人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang ,  Li-Fang Lin

    IPC分类号： H01R12/71

    CPC分类号： H01L23/481 ,  H01L23/66 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.

    摘要翻译： 提供了互连机制，其包括配对的第一子互连机制和成对的第二子互连机制。 第一对副互连机构包括第一和第二轴对称的螺旋导电元件。 第二对副互连机构包括第三和第四轴对称的螺旋导电元件。 在具有螺旋形状的差分传输结构中配置副互连机构对被用于反转由小型化制造工艺引起的不同芯片或基板之间的声音和噪声信号或增加的布线密度。

    Interconnecting mechanism for 3D integrated circuit
    2.
    发明授权
    Interconnecting mechanism for 3D integrated circuit 有权
    三维集成电路互连机制

    公开(公告)号：US08736059B2

    公开(公告)日：2014-05-27

    申请号：US13306051

    申请日：2011-11-29

    申请人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang ,  Li-Fang Lin

    发明人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang ,  Li-Fang Lin

    IPC分类号： H01L23/52

    CPC分类号： H01L23/481 ,  H01L23/66 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.

    摘要翻译： 提供了互连机制，其包括配对的第一子互连机制和成对的第二子互连机制。 第一对副互连机构包括第一和第二轴对称的螺旋导电元件。 第二对副互连机构包括第三和第四轴对称的螺旋导电元件。 在具有螺旋形状的差分传输结构中配置副互连机构对被用于反转由小型化制造工艺引起的不同芯片或基板之间的声音和噪声信号或增加的布线密度。

    ASYMMETRIC DIFFERENTIAL INDUCTOR
    3.
    发明申请
    ASYMMETRIC DIFFERENTIAL INDUCTOR 有权
    不对称差分电感器

    公开(公告)号：US20120299683A1

    公开(公告)日：2012-11-29

    申请号：US13222231

    申请日：2011-08-31

    申请人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    发明人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    IPC分类号： H01F5/00

    CPC分类号： H01F17/0006 ,  H01F19/00

    摘要： An asymmetric differential inductor includes first and second conductive wirings spirally disposed on a substrate having a first input terminal, a second input terminal, a ground terminal, and a central conductive wiring. The central conductive wiring has a central contact connecting the ground terminal and a central end away from the ground terminal. The first conductive wiring extends across the central conductive wiring and has a first contact connecting the first input terminal and a first end connecting the central end. The second conductive wiring extends across the central conductive wiring and interlaces with the first conductive wiring and has a second contact connecting the second input terminal and a second end connecting the central end. Corresponding portions of wiring sections of the first and second conductive wirings at opposite sides of the central conductive wiring are asymmetrical to one another to thereby save substrate space and facilitate circuit layout.

    摘要翻译： 非对称差分电感器包括螺旋地设置在具有第一输入端子，第二输入端子，接地端子和中心导电布线的基板上的第一和第二导电布线。 中心导电布线具有连接接地端子和远离接地端子的中心端的中心接触点。 第一导电布线延伸穿过中心导电布线，并且具有连接第一输入端和连接中心端的第一端的第一触点。 所述第二导电布线延伸穿过所述中心导电布线并与所述第一导电布线交织，并且具有连接所述第二输入端子和连接所述中心端部的第二端部的第二触点。 在中心导电布线的相对侧的第一和第二导电布线的布线部分的相应部分彼此不对称，从而节省基板空间并且便于布线。

    Asymmetric differential inductor
    4.
    发明授权
    Asymmetric differential inductor 有权
    不对称差分电感

    公开(公告)号：US08493168B2

    公开(公告)日：2013-07-23

    申请号：US13222231

    申请日：2011-08-31

    申请人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    发明人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    IPC分类号： H01F5/00 ,  H01F27/28

    CPC分类号： H01F17/0006 ,  H01F19/00

    摘要： An asymmetric differential inductor includes first and second conductive wirings spirally disposed on a substrate having a first input terminal, a second input terminal, a ground terminal, and a central conductive wiring. The central conductive wiring has a central contact connecting the ground terminal and a central end away from the ground terminal. The first conductive wiring extends across the central conductive wiring and has a first contact connecting the first input terminal and a first end connecting the central end. The second conductive wiring extends across the central conductive wiring and interlaces with the first conductive wiring and has a second contact connecting the second input terminal and a second end connecting the central end. Corresponding portions of wiring sections of the first and second conductive wirings at opposite sides of the central conductive wiring are asymmetrical to one another to thereby save substrate space and facilitate circuit layout.

    摘要翻译： 非对称差分电感器包括螺旋地设置在具有第一输入端子，第二输入端子，接地端子和中心导电布线的基板上的第一和第二导电布线。 中心导电布线具有连接接地端子和远离接地端子的中心端的中心接触点。 第一导电布线延伸穿过中心导电布线，并且具有连接第一输入端和连接中心端的第一端的第一触点。 所述第二导电布线延伸穿过所述中心导电布线并与所述第一导电布线交织，并且具有连接所述第二输入端子和连接所述中心端部的第二端部的第二触点。 在中心导电布线的相对侧的第一和第二导电布线的布线部分的相应部分彼此不对称，从而节省基板空间并且便于布线。

    Symmetric differential inductor structure
    5.
    发明授权
    Symmetric differential inductor structure 有权
    对称差分电感结构

    公开(公告)号：US08305182B1

    公开(公告)日：2012-11-06

    申请号：US13243138

    申请日：2011-09-23

    申请人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    发明人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    IPC分类号： H01F5/00 ,  H01F27/28

    CPC分类号： H01L23/5227 ,  H01F19/04 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A symmetric differential inductor structure includes first, second, third and fourth spiral conductive wirings disposed in four quadrants of a substrate, respectively. Further, a fifth conductive wiring connects the first and fourth spiral conductive wirings, and a sixth conductive wiring connects the second and third spiral conductive wirings. The first and second spiral conductive wirings are symmetric but not intersected with one another, and the third and fourth spiral conductive wirings are symmetric but not intersected with one another. Therefore, the invention attains full geometric symmetry to avoid using conductive wirings that occupy a large area of the substrate as in the prior art and to thereby increase the product profit and yield.

    摘要翻译： 对称差分电感器结构包括分别设置在基板的四个象限内的第一，第二，第三和第四螺旋导电布线。 此外，第五导电布线连接第一和第四螺旋导电布线，并且第六导电布线连接第二和第三螺旋导电布线。 第一和第二螺旋导电布线是对称的，但是彼此不相交，第三和第四螺旋导电布线是对称的但彼此不相交。 因此，本发明获得完全的几何对称性，以避免如现有技术那样使用占据基板的大面积的导电布线，从而提高产品利润和产量。

    LAYER STRUCTURE WITH EMI SHIELDING EFFECT
    6.
    发明申请
    LAYER STRUCTURE WITH EMI SHIELDING EFFECT 有权
    具有EMI屏蔽效应的层结构

    公开(公告)号：US20130032931A1

    公开(公告)日：2013-02-07

    申请号：US13242941

    申请日：2011-09-23

    申请人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang

    发明人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang

    IPC分类号： H01L23/552

    CPC分类号： H01L23/552 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A layer structure with an electromagnetic interference (EMI) shielding effect is applicable for reducing an EMI effect caused by signal transmission between through silicon vias, so as to effectively provide the EMI shielding effect between electrical interconnections of a three-dimensional (3D) integrated circuit. By forming EMI-shielding through silicon vias at predetermined positions between the through silicon vias used for signal transmission, a good EMI shielding effect can be attended, and signal distortion possibly caused by the EMI effect can be reduced between different chips or substrates.

    摘要翻译： 具有电磁干扰（EMI）屏蔽效应的层结构适用于降低通过硅通孔之间的信号传输引起的EMI效应，从而有效地提供三维（3D）集成电路的电互连之间的EMI屏蔽效应 。 通过在用于信号传输的通过硅通孔之间的预定位置处通过硅通孔形成EMI屏蔽，可以考虑良好的EMI屏蔽效应，并且可以在不同的芯片或衬底之间减少可能由EMI效应引起的信号失真。

    SYMMETRIC DIFFERENTIAL INDUCTOR STRUCTURE
    7.
    发明申请
    SYMMETRIC DIFFERENTIAL INDUCTOR STRUCTURE 有权
    对称差分电感结构

    公开(公告)号：US20120299682A1

    公开(公告)日：2012-11-29

    申请号：US13243138

    申请日：2011-09-23

    申请人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    发明人： Ming-Fan Tsai ,  Kuan-Yu Chen ,  Bo-Shiang Fang ,  Hsin-Hung Lee

    IPC分类号： H01F27/29

    CPC分类号： H01L23/5227 ,  H01F19/04 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A symmetric differential inductor structure includes first, second, third and fourth spiral conductive wirings disposed in four quadrants of a substrate, respectively. Further, a fifth conductive wiring connects the first and fourth spiral conductive wirings, and a sixth conductive wiring connects the second and third spiral conductive wirings. The first and second spiral conductive wirings are symmetric but not intersected with one another, and the third and fourth spiral conductive wirings are symmetric but not intersected with one another. Therefore, the invention attains full geometric symmetry to avoid using conductive wirings that occupy a large area of the substrate as in the prior art and to thereby increase the product profit and yield.

    摘要翻译： 对称差分电感器结构包括分别设置在基板的四个象限中的第一，第二，第三和第四螺旋导电布线。 此外，第五导电布线连接第一和第四螺旋导电布线，并且第六导电布线连接第二和第三螺旋导电布线。 第一和第二螺旋导电布线是对称的，但是彼此不相交，第三和第四螺旋导电布线是对称的但彼此不相交。 因此，本发明获得完全的几何对称性，以避免如现有技术那样使用占据基板的大面积的导电布线，从而提高产品利润和产量。

    Layer structure with EMI shielding effect
    8.
    发明授权
    Layer structure with EMI shielding effect 有权
    层结构具有EMI屏蔽效果

    公开(公告)号：US08399965B2

    公开(公告)日：2013-03-19

    申请号：US13242941

    申请日：2011-09-23

    申请人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang

    发明人： Ming-Fan Tsai ,  Hsin-Hung Lee ,  Bo-Shiang Fang

    IPC分类号： H01L23/552

    CPC分类号： H01L23/552 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A layer structure with an electromagnetic interference (EMI) shielding effect is applicable for reducing an EMI effect caused by signal transmission between through silicon vias, so as to effectively provide the EMI shielding effect between electrical interconnections of a three-dimensional (3D) integrated circuit. By forming EMI-shielding through silicon vias at predetermined positions between the through silicon vias used for signal transmission, a good EMI shielding effect can be attended, and signal distortion possibly caused by the EMI effect can be reduced between different chips or substrates.

    摘要翻译： 具有电磁干扰（EMI）屏蔽效应的层结构适用于降低通过硅通孔之间的信号传输引起的EMI效应，从而有效地提供三维（3D）集成电路的电互连之间的EMI屏蔽效应 。 通过在用于信号传输的通过硅通孔之间的预定位置处通过硅通孔形成EMI屏蔽，可以考虑良好的EMI屏蔽效应，并且可以在不同的芯片或衬底之间减少可能由EMI效应引起的信号失真。

    CROSS-COUPLED BANDPASS FILTER
    9.
    发明申请
    CROSS-COUPLED BANDPASS FILTER 有权
    交叉耦合滤波器

    公开(公告)号：US20130141187A1

    公开(公告)日：2013-06-06

    申请号：US13588077

    申请日：2012-08-17

    申请人： Min-Han Chuang ,  Chia-Chu Lai ,  Bo-Shiang Fang ,  Ho-Chuan Lin ,  Li-Fang Lin

    发明人： Min-Han Chuang ,  Chia-Chu Lai ,  Bo-Shiang Fang ,  Ho-Chuan Lin ,  Li-Fang Lin

    IPC分类号： H03H7/01

    CPC分类号： H03H7/09 ,  H01P1/20327 ,  H03H7/0161 ,  H03H7/12

    摘要： A cross-coupled bandpass filter includes first, second and third resonators such that a positive mutual inductance is generated between the first and third resonators and mutual inductance generated between the first and second resonators and mutual inductance generated between the second and third resonators have the same polarity, thereby generating a transmission zero in a high frequency rejection band.

    摘要翻译： 交叉耦合带通滤波器包括第一，第二和第三谐振器，使得在第一和第三谐振器之间产生正互感，并且在第一和第二谐振器之间产生的互感和在第二和第三谐振器之间产生的互感相同 从而在高频抑制频带中产生传输零点。