摘要:
An integrated circuit includes at least one transistor over a substrate. A first guard ring is disposed around the at least one transistor. The first guard ring has a first type dopant. A second guard ring is disposed around the first guard ring. The second guard ring has a second type dopant. A first doped region is disposed adjacent to the first guard ring. The first doped region has the second type dopant. A second doped region is disposed adjacent to the second guard ring. The second doped region has the first type dopant. The first guard ring, the second guard ring, the first doped region, and the second doped region are capable of being operable as a first silicon controlled rectifier (SCR) to substantially release an electrostatic discharge (ESD).
摘要:
The present invention discloses a method for fabricating a bottom-gate low-temperature polysilicon thin film transistor, wherein the bottom gate structure is used to form an amorphous silicon layer with varied thicknesses; the amorphous silicon layer in the step region on the border of the bottom gate structure is partially melted by an appropriate amount of laser energy; the partially-melted amorphous silicon layer in the step region functions as crystal seeds and makes crystal grains grow toward the channel region where the amorphous silicon layer is fully melted, and the crystal grains are thus controlled to grow along the lateral direction to form a lateral-grain growth low-temperature polysilicon thin film. The lateral grain growth can reduce the number of the grain boundaries carriers have to pass through. Thus, the present invention can promote the carrier mobility in the active region and the electric performance. Further, the present invention can achieve a superior element motive force and a steeper subthreshold swing.