公开(公告)号：US20120105492A1

公开(公告)日：2012-05-03

申请号：US12982801

申请日：2010-12-30

申请人： Ming-Xian Li

发明人： Ming-Xian Li

IPC分类号： G09G5/10 ,  H05B37/00 ,  H05B37/02

CPC分类号： H05B33/0827 ,  G09G3/3406

摘要： A backlight module and a driving circuit are provided. The driving circuit includes a plurality of current sources and a current switching unit. The current sources provide a plurality of driving currents. The current switching unit is coupled between a plurality of light emitting element strings and the current sources for transmitting the driving currents to the light emitting element strings, and switching the driving currents received by the light emitting element strings by timing. Therefore, the brightness of the light emitting element strings can be equalized.

摘要翻译： 提供背光模块和驱动电路。 驱动电路包括多个电流源和电流切换单元。 电流源提供多个驱动电流。 电流开关单元耦合在多个发光元件串和用于将驱动电流传输到发光元件串的电流源之间，并且通过定时切换由发光元件串接收的驱动电流。 因此，可以使发光元件串的亮度相等。

公开(公告)号：US09271356B2

公开(公告)日：2016-02-23

申请号：US12982801

申请日：2010-12-30

申请人： Ming-Xian Li

发明人： Ming-Xian Li

IPC分类号： G09G5/10 ,  H05B33/08 ,  G09G3/34

CPC分类号： H05B33/0827 ,  G09G3/3406

摘要： A backlight module and a driving circuit are provided. The driving circuit includes a plurality of current sources and a current switching unit. The current sources provide a plurality of driving currents. The current switching unit is coupled between a plurality of light emitting element strings and the current sources for transmitting the driving currents to the light emitting element strings, and switching the driving currents received by the light emitting element strings by timing. Therefore, the brightness of the light emitting element strings can be equalized.

摘要翻译： 提供背光模块和驱动电路。 驱动电路包括多个电流源和电流切换单元。 电流源提供多个驱动电流。 电流开关单元耦合在多个发光元件串和用于将驱动电流传输到发光元件串的电流源之间，并且通过定时切换由发光元件串接收的驱动电流。 因此，可以使发光元件串的亮度相等。

公开(公告)号：US08120568B2

公开(公告)日：2012-02-21

申请号：US12424385

申请日：2009-04-15

申请人： Ming-Xian Li ,  Chiao-Lin Huang

发明人： Ming-Xian Li ,  Chiao-Lin Huang

IPC分类号： G09G3/36

CPC分类号： H04N5/70 ,  G09G3/3688

摘要： The present invention discloses an source driver circuit scheme for displayer, which comprises a shifter register to register data signal, a line buffer coupled with said shifter register to latch the data signal, a level shifter coupled with line buffer to level output electrical potential, a digital-to-analog converter (DAC) to convert digital signal to analog signal, an output buffer coupled with said digital-to-analog converter (DAC) to output converted signal, and an output control circuit coupled with output buffer. Said output control circuit comprises a D flip-flop and CMOS switching element to output a LP_out signal and control the data signal output of the source driver IC to avoid the power-on noise of the displayer.

摘要翻译： 本发明公开了一种用于显示器的源极驱动器电路方案，其包括用于寄存数据信号的移位寄存器，与所述移位寄存器耦合的线缓冲器来锁存数据信号，与行缓冲器耦合的电平移位器以使电平输出电位， 数模转换器（DAC），用于将数字信号转换为模拟信号;输出缓冲器，与所述数/模转换器（DAC）耦合以输出转换信号;以及输出控制电路，与输出缓冲器耦合。 所述输出控制电路包括D触发器和CMOS开关元件，以输出LP_out信号并控制源极驱动器IC的数据信号输出，以避免显示器的上电噪声。

公开(公告)号：US07167120B1

公开(公告)日：2007-01-23

申请号：US11307471

申请日：2006-02-09

申请人： Ming-Xian Li ,  Jiao-Lin Huang ,  Shih-Tao Lai

发明人： Ming-Xian Li ,  Jiao-Lin Huang ,  Shih-Tao Lai

IPC分类号： H03M1/66

CPC分类号： H03M1/68 ,  G09G3/2051 ,  G09G3/3685 ,  H03M1/76

摘要： An apparatus for digital-to-analog conversion and the method thereof is disclosed, wherein the complete scale-tuned levels of more bits may be presented with an output of less bits. The apparatus comprises a timing controller, a scale-tuned circuit and a digital-to-analog converter. The timing controller receives an a-bit grayscale value, and outputs a selection signal and a b-bit control signal, wherein a, b are both positive integers and a>b>=1. The selection signal has two states: if the grayscale value is less than or equal to 2a−2c, wherein c is equal to a−b, the selection signal is in a first state; and if the grayscale value is equal to 2a−2c+n, wherein n is an integer and 0

摘要翻译： 公开了一种用于数模转换的装置及其方法，其中可以用较少位的输出来呈现更多比特的完整比例调整级别。 该装置包括定时控制器，比例调谐电路和数模转换器。 定时控制器接收a位灰度值，并输出选择信号和b位控制信号，其中a，b均为正整数，a> b> = 1。 选择信号具有两个状态：如果灰度值小于或等于2，其中c等于ab，则选择信号处于 第一状态 并且如果灰度值等于2 ^{a + 2 + + + + n，其中n是整数，并且0 C， 选择信号具有n / 2 <>的概率处于第二状态，并且具有1-n / 2 的概率处于第一状态。}

公开(公告)号：US08269711B2

公开(公告)日：2012-09-18

申请号：US12577709

申请日：2009-10-12

申请人： Chung-Chih Hsiao ,  Jiao-Lin Huang ,  Ming-Xian Li

发明人： Chung-Chih Hsiao ,  Jiao-Lin Huang ,  Ming-Xian Li

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3648 ,  G09G2330/021 ,  G09G2340/0435

摘要： An LCD (Liquid Crystal Display) Device of improvement of flicker upon switching frame rate and method for the same are proposed. The LCD device includes a pixel matrix, a timing controller and a gate driver. The timing controller outputs a first Gate-On-Enable signal to the gate driver, when the LCD device displays frame according to a first frame rate. When the first frame rate is switched to a second frame rate, the timing controller outputs a second Gate-On-Enable signal to the gate driver to cause a charge time of the pixel matrix to be unchanged. It is appreciated that a pulse width of the second Gate-On-Enable signal is equal to a summation of a pulse width of the first Gate-On-Enable signal and an adjusted pulse width.

摘要翻译： 提出了一种LCD（液晶显示器）在切换帧速率下闪烁改善的装置及其方法。 LCD装置包括像素矩阵，定时控制器和栅极驱动器。 当LCD设备根据第一帧速率显示帧时，定时控制器向门驱动器输出第一栅极导通使能信号。 当第一帧速率切换到第二帧速率时，定时控制器向栅极驱动器输出第二栅极导通使能信号，以使得像素矩阵的充电时间不变。 应当理解，第二栅极导通使能信号的脉冲宽度等于第一栅极导通使能信号的脉冲宽度和调整的脉冲宽度的总和。

公开(公告)号：US07839398B2

公开(公告)日：2010-11-23

申请号：US11863284

申请日：2007-09-28

申请人： Ming-Xian Li ,  Chih-Min Yu

发明人： Ming-Xian Li ,  Chih-Min Yu

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2330/04

摘要： A gate driving circuit and a power control circuit are disclosed. The gate driving circuit includes a gate driver and the power control circuit. The gate driver is adapted for receiving a starting signal and sequentially outputting a plurality of scan signals accordingly. The power control circuit includes a delay circuit, a level shifter and a switch unit. The delay circuit is adapted for receiving and delaying the starting signal for a predetermined period and then outputting the delayed starting signal. The level shifter receives and adjusts a voltage level of the delayed starting signal, and outputs a starting voltage accordingly. The switch unit provides the first power to the gate driver after being delayed for the predetermined period according to the starting voltage.

摘要翻译： 公开了一种栅极驱动电路和功率控制电路。 栅极驱动电路包括栅极驱动器和功率控制电路。 栅极驱动器适于接收起始信号并且相应地依次输出多个扫描信号。 功率控制电路包括延迟电路，电平转换器和开关单元。 延迟电路适于在预定时间段内接收和延迟启动信号，然后输出延迟的启动信号。 电平移位器接收和调整延迟启动信号的电压电平，并相应地输出起始电压。 开关单元根据启动电压在延迟预定时间段之后向栅极驱动器提供第一功率。

公开(公告)号：US20080316195A1

公开(公告)日：2008-12-25

申请号：US11863284

申请日：2007-09-28

申请人： Ming-Xian Li ,  Chih-Min Yu

发明人： Ming-Xian Li ,  Chih-Min Yu

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2330/04

摘要： A gate driving circuit and a power control circuit are disclosed. The gate driving circuit includes a gate driver and the power control circuit. The gate driver is adapted for receiving a starting signal and sequentially outputting a plurality of scan signals accordingly. The power control circuit includes a delay circuit, a level shifter and a switch unit. The delay circuit is adapted for receiving and delaying the starting signal for a predetermined period and then outputting the delayed starting signal. The level shifter receives and adjusts a voltage level of the delayed starting signal, and outputs a starting voltage accordingly. The switch unit provides the first power to the gate driver after being delayed for the predetermined period according to the starting voltage.

摘要翻译： 公开了一种栅极驱动电路和功率控制电路。 栅极驱动电路包括栅极驱动器和功率控制电路。 栅极驱动器适于接收起始信号并且相应地依次输出多个扫描信号。 功率控制电路包括延迟电路，电平转换器和开关单元。 延迟电路适于在预定时间段内接收和延迟启动信号，然后输出延迟的启动信号。 电平移位器接收和调整延迟启动信号的电压电平，并相应地输出起始电压。 开关单元根据启动电压在延迟预定时间段之后向栅极驱动器提供第一功率。