-
公开(公告)号：US07068280B1
公开(公告)日：2006-06-27
申请号：US10316727
申请日：2002-12-11
CPC分类号： G06F5/10 , G06F3/16 , G10L19/16 , H04N21/4392
摘要： Overlay buffering scheme for multi-channel data in which one memory buffer content is overlayed over another as memory locations of an input buffer are freed when data is output from the input buffer. By overlaying the buffer content, only one input buffer is used, reducing the needed memory by half.
摘要翻译： 当从输入缓冲器输出数据时，多通道数据的叠加缓冲方案被释放，其中一个存储器缓冲器内容覆盖另一个存储器缓冲器内容作为输入缓冲器的存储器位置。 通过覆盖缓冲区内容，仅使用一个输入缓冲区，将所需内存减少一半。
-
公开(公告)号：US6101598A
公开(公告)日：2000-08-08
申请号：US970372
申请日：1997-11-14
申请人： Miroslav Dokic , Raghunath Rao , Zheng Luo , Jeffrey Niehaus , James Divine
发明人： Miroslav Dokic , Raghunath Rao , Zheng Luo , Jeffrey Niehaus , James Divine
CPC分类号： G06F11/3656
摘要： A method of operating a multiple processor device. A first word of a sequence of words is received in a register. A target processor is determined from the first word and the target processor is interrupted. An input ready bit is set and first word from in the register is read with the target processor. A number of words in the sequence to follow the first word determined from the first word. A word counter is set and the input ready bit is cleared with the target processor. The target processor is returned to main code execution.
摘要翻译： 一种操作多处理器设备的方法。 在一个寄存器中接收一个字序列的第一个字。 从第一个字确定目标处理器，并且目标处理器被中断。 输入就绪位被置位，并且用目标处理器读取寄存器中的第一个字。 序列中的多个单词遵循从第一个单词确定的第一个单词。 一个字计数器被设置并且输入就绪位被目标处理器清除。 目标处理器返回主代码执行。
-
公开(公告)号：US5960401A
公开(公告)日：1999-09-28
申请号：US970302
申请日：1997-11-14
申请人： Raghunath Rao , Miroslav Dokic
发明人： Raghunath Rao , Miroslav Dokic
CPC分类号： G10L19/035 , H04B1/66
摘要： A method of processing exponent data in an audio decoder. A first block of audio data is received including encoded exponent data. The encoded exponent data is packed into packed encoded words and stored in memory. Exponents are generated from the packed encoded words in memory for processing the first block of audio data. A second block of audio data is received. A determination is made as to whether a reuse flag has been set for the second block, and if the reuse flag has been set, exponents are generated from the packed encoded words memory for processing the second block of data.
摘要翻译： 一种在音频解码器中处理指数数据的方法。 接收包括编码指数数据的音频数据的第一块。 编码的指数数据被打包成压缩编码的字并存储在存储器中。 指数是从存储器中的压缩编码字生成的，用于处理第一音频数据块。 接收第二个音频数据块。 确定是否为第二块设置了重用标志，并且如果已经设置了重用标志，则从压缩编码字存储器生成指数，以处理第二数据块。
-
公开(公告)号：US06898470B1
公开(公告)日：2005-05-24
申请号：US09707875
申请日：2000-11-07
CPC分类号： H03G5/005
摘要： Digital tone controls 500 include a first path 502 including a digital filter 504 and a scaler 505 for controlling a level of a low frequency component of a received digital audio signal. A second 502 includes a digital filter 504 and a scaler 505 for controlling a level of a high frequency component of the received digital audio signal. A third path 503 includes a scaler 506 for controlling a level of an unfiltered component of the received audio signal. A summer 507 adds a contribution from each of the paths to generate a composite signal having a selected gain-frequency response.
摘要翻译： 数字音调控制器500包括包括数字滤波器504的第一路径502和用于控制接收到的数字音频信号的低频分量电平的缩放器505。 第二个502包括一个数字滤波器504和一个用于控制接收到的数字音频信号的高频分量电平的定标器505。 第三路径503包括用于控制所接收的音频信号的未滤波分量的电平的定标器506。 加法器507从每个路径添加贡献以产生具有选定的增益 - 频率响应的复合信号。
-
公开(公告)号：US6145007A
公开(公告)日：2000-11-07
申请号：US969883
申请日：1997-11-14
申请人： Miroslav Dokic , Raghunath Rao , Jeffrey Niehaus , Zheng Luo , James Divine
发明人： Miroslav Dokic , Raghunath Rao , Jeffrey Niehaus , Zheng Luo , James Divine
CPC分类号： G06F13/4022
摘要： A method of exchanging messages between first and second processors. A pending flag in a first register is polled by the first processor and if the flag is in a first selected logic state, a message is written into a second register with the first processor. The pending flag is set to a second selected logic state with the first processor and an interrupt to the second processor is generated. The message is read from the second register with the second processor when the pending flag is in the second logic state. The pending flag set to the first logic state with the second processor.
摘要翻译： 一种在第一和第二处理器之间交换消息的方法。 由第一处理器轮询第一寄存器中的未决标志，如果标志处于第一选择的逻辑状态，则将消息写入与第一处理器的第二寄存器。 待处理标志被设置为具有第一处理器的第二选择的逻辑状态，并且产生到第二处理器的中断。 当挂起标志处于第二逻辑状态时，从第二个寄存器读取该消息。 待处理标志设置为与第二处理器的第一逻辑状态。
-
6.发明授权Dual processor audio decoder and methods with sustained data pipelining during error conditions 失效双处理器音频解码器和在错误条件下具有持续数据流水线的方法
公开(公告)号：US6009389A
公开(公告)日：1999-12-28
申请号：US971080
申请日：1997-11-14
申请人： Miroslav Dokic , Raghunath Rao
发明人： Miroslav Dokic , Raghunath Rao
IPC分类号： G10L3/00
CPC分类号： G10L19/16 , G10L19/005
摘要： A method of concealing errors received in a stream of data by a multiprocessor system having a first digital signal processor for initial processing of incoming data and a second digital signal processor for processing data passed from the first processor. The method includes the steps of detecting an error in an incoming frame of the stream of data with the first processor, sending an error message from the first to the second processor, halting transmission of the remainder of the frame to the second processor, and processing a frame of dummy data with the second processor. The frame of dummy data is passed to a processing engine forming a portion of the second processor to maintain data pipelining. Interprocessor communications between the first and second processors is established by handshaking through an interprocessor communications register, wherein the first processor detects an error in a frame of data and sends a message to the second processor. In selected embodiments, the first and second processors are fabricated on a single integrated circuit chip along with shared memory for exchanging data between the processors and data memory associated with each processor.
摘要翻译： 一种通过具有用于初始处理输入数据的第一数字信号处理器的多处理器系统隐藏在数据流中接收的错误的方法和用于处理从第一处理器传递的数据的第二数字信号处理器。 该方法包括以下步骤：利用第一处理器检测数据流的输入帧中的错误，从第一处理器向第二处理器发送错误消息，停止向第二处理器发送剩余帧，以及处理 与第二处理器的伪数据帧。 伪数据的帧被传递到形成第二处理器的一部分的处理引擎以维持数据流水线化。 第一处理器和第二处理器之间的处理器之间的通信是通过通过处理器间通信寄存器的握手建立的，其中第一处理器检测数据帧中的错误并向第二处理器发送消息。 在选择的实施例中，第一和第二处理器与单独的集成电路芯片一起制造，共享存储器用于在与每个处理器相关联的处理器和数据存储器之间交换数据。
-
7.发明授权公开(公告)号：US06349285B1
公开(公告)日：2002-02-19
申请号：US09340619
申请日：1999-06-28
申请人： Pu Liu , Raghunath Rao , Miroslav Dokic
发明人： Pu Liu , Raghunath Rao , Miroslav Dokic
IPC分类号： G10L2100
CPC分类号： H04S3/00 , H04S7/307 , H04S2400/07
摘要： A method of managing multiple channels of audio data in an audio system having multiple speakers. A first channel signal is selectively passed through a software high-pass filter to selectively drive a first one of the speakers. A plurality of channel signals are selectively summed in software to generate a composite signal and the composite signal passed through a software low-pass filter to selectively drive a second one of the speakers.
摘要翻译： 一种在具有多个扬声器的音频系统中管理音频数据的多个声道的方法。 第一通道信号被选择性地通过软件高通滤波器以选择性地驱动扬声器中的第一个。 多个信道信号被选择性地相加在软件中以产生复合信号，并且复合信号通过软件低通滤波器来选择性地驱动第二个扬声器。
-
8.发明授权Dual processor digital audio decoder with shared memory data transfer and task partitioning for decompressing compressed audio data, and systems and methods using the same 失效具有共享存储器数据传输和任务分区的双处理器数字音频解码器，用于解压缩压缩音频数据，以及使用其的系统和方法
公开(公告)号：US6081783A
公开(公告)日：2000-06-27
申请号：US970979
申请日：1997-11-14
申请人： James Divine , Jeffrey Niehaus , Miroslav Dokic , Raghunath Rao , Terry Ritchie , Baker Scott, III , John Pacourek , Zheng Luo
发明人： James Divine , Jeffrey Niehaus , Miroslav Dokic , Raghunath Rao , Terry Ritchie , Baker Scott, III , John Pacourek , Zheng Luo
CPC分类号： H03M7/30
摘要： An audio decoder 100 for operating on a received compressed audio data stream compressed using an algorithm employing transform encoding and a bit allocation routine. A first processor 200 performs a first set of operations on the received compressed audio data stream including parsing the compressed audio data stream, recovering data fields within the compressed audio data stream, calculating a bit allocation, and passing frequency domain coefficients to shared memory. A second digital signal processor 100b performs a second set of operations on data passed from the first digital signal processor to shared memory including performing inverse transform operations on the data passed from the first digital signal processor.
摘要翻译： 一种音频解码器100，用于对使用采用变换编码的算法和位分配程序压缩的接收的压缩音频数据流进行操作。 第一处理器200对所接收的压缩音频数据流执行第一组操作，包括解析压缩音频数据流，恢复压缩音频数据流内的数据字段，计算比特分配，以及将频域系数传递给共享存储器。 第二数字信号处理器100b对从第一数字信号处理器传送到共享存储器的数据执行第二组操作，包括对从第一数字信号处理器传送的数据执行逆变换操作。
-
9.发明授权Systems and methods for transmitting bursty-asnychronous data over a synchronous link 有权通过同步链路传输突发异步数据的系统和方法公开(公告)号：US06804655B2
公开(公告)日：2004-10-12
申请号：US09778229
申请日：2001-02-06
IPC分类号： G01L1900
CPC分类号： H04H20/82
摘要： A method for transferring data bursts via a synchronous data link includes the step of receiving a burst of packets, each packet including a header and a frame of data compressed at a selected sampling rate and transmitted at a selected bit rate. At least one of the packets of the stream of packets is embedded into a carrier frame including a carrier frame header. The carrier frame is then transmitted via the synchronous link. The data frame is extracted from the carrier frame and decompressed at the sample rate.
摘要翻译： 用于经由同步数据链路传送数据脉冲串的方法包括接收分组脉冲串的步骤，每个分组包括以所选择的采样率压缩并以所选位速率发送的报头和数据帧。 分组流的分组中的至少一个嵌入到包括载波帧报头的载波帧中。 然后通过同步链路传输载波帧。 从载波帧中提取数据帧，并以采样率进行解压缩。
-
10.发明授权Accessing shared memory using token bit held by default by a single processor 失效使用单个处理器默认保存的令牌位访问共享内存公开(公告)号：US06385704B1
公开(公告)日：2002-05-07
申请号：US08969884
申请日：1997-11-14
申请人： Raghunath Rao , Miroslav Dokic , Zheng Luo , Jeffrey Niehaus , James Divine
发明人： Raghunath Rao , Miroslav Dokic , Zheng Luo , Jeffrey Niehaus , James Divine
IPC分类号： G06F1200
CPC分类号： G10L19/16
摘要： A method of operating shared memory in a multiple processor system. A token is by default maintained with a first processor, the token enabling access to shared memory. A determination is made that a second processor requires access to shared memory. A determination is also made as to whether the first processor is accessing to the shared memory. The token is transferred the second processor if the first processor is not accessing the shared memory. The second processor accesses the shared memory with the token.
摘要翻译： 一种在多处理器系统中操作共享存储器的方法。 默认情况下，使用第一个处理器维护令牌，令牌允许访问共享内存。 确定第二处理器需要访问共享存储器。 还确定第一处理器是否正在访问共享存储器。 如果第一个处理器没有访问共享存储器，令牌将传输第二个处理器。 第二个处理器使用令牌访问共享内存。
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.02 秒)
