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公开(公告)号:US11251299B2
公开(公告)日:2022-02-15
申请号:US16967730
申请日:2018-03-28
摘要: A drift layer made of silicon carbide has a first conductivity type. A body region on the drift layer has a second conductivity type. A source region on the body region has the first conductivity type. A gate insulating film is on each inner wall of at least one trench. A protective layer has at least a portion below the trench, is in contact with the drift layer, and has the second conductivity type. A first low-resistance layer is in contact with the trench and the protective layer, straddles a border between the trench and the protective layer in the depth direction, has the first conductivity type, and has a higher impurity concentration than the drift layer. A second low-resistance layer is in contact with the first low-resistance layer, is away from the trench, has the first conductivity type, and has a higher impurity concentration than the first low-resistance layer.
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公开(公告)号:US12107158B2
公开(公告)日:2024-10-01
申请号:US17456250
申请日:2021-11-23
CPC分类号: H01L29/7805 , H01L29/0623 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/7811
摘要: An object of the present disclosure is to suppress decrease in withstand voltage and increase in ON voltage and to increase body diode current. An SiC-MOSFET includes: a source region formed on a surface layer of a base region; a gate electrode facing a channel region which is a region of the base region sandwiched between a drift layer and the source region via a gate insulating film; a source electrode having electrically contact with the source region; and a plurality of first embedded regions of a second conductivity type formed adjacent to a lower surface of the base region. The plurality of first embedded regions are formed immediately below at least both end portions of the base region, and three or more first embedded regions are formed to be separated from each other.
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公开(公告)号:US11658238B2
公开(公告)日:2023-05-23
申请号:US16912439
申请日:2020-06-25
IPC分类号: H01L29/78 , H03K17/687 , H01L29/66 , H01L29/16 , H01L29/06 , H01L29/423
CPC分类号: H01L29/7815 , H01L29/66068 , H01L29/7811 , H01L29/7813 , H03K17/687 , H01L29/0623 , H01L29/0696 , H01L29/1608 , H01L29/4238
摘要: A semiconductor device includes a trench-type switching element formed in an active region and a trench-type current sense element formed in a current sense region. Below a trench in which a gate electrode of the switching element is embedded, a trench in which a gate electrode of the current sense element is embedded, and a trench formed at the boundary portion between the active region and the current sense region, protective layers are formed, respectively. The protective layer at the boundary portion between the active region and the current sense region has a divided portion that is divided in a direction from the active region to the current sense region.
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公开(公告)号:US11309416B2
公开(公告)日:2022-04-19
申请号:US16757766
申请日:2017-12-21
发明人: Hideyuki Hatta , Shiro Hino , Katsutoshi Sugawara
IPC分类号: H01L29/78 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/423 , H01L29/66 , H01L29/739
摘要: A drift layer has a first conductivity type. A well region has a second conductivity type. A well contact region has a resistivity lower than that of the well region. A source contact region is provided on the well region, separated from the drift layer by the well region, and has the first conductivity type. A source resistance region is provided on the well region, separated from the drift layer by the well region, is adjacent to the source contact region, has the first conductivity type, and has a sheet resistance higher than that of the source contact region. A source electrode contacts the source contact region, the well contact region, and the source resistance region, and is continuous with the channel at least through the source resistance region.
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公开(公告)号:US11049931B2
公开(公告)日:2021-06-29
申请号:US16717486
申请日:2019-12-17
发明人: Yutaka Fukui , Katsutoshi Sugawara , Shiro Hino , Kazuya Konishi , Kohei Adachi
IPC分类号: H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/36 , H01L29/417 , H01L29/423 , H01L29/739 , H01L29/78 , H01L21/02 , H01L21/04 , H01L23/544 , H01L29/66
摘要: A gate connection layer (14) includes a portion placed on an outer trench (TO) with a gate insulating film (7) being interposed. A first main electrode (10) includes a main contact (CS) electrically connected to a well region (4) and a first impurity region (5) within an active region (30), and an outer contact (CO) being spaced away from the active region (30) and in contact with a bottom face of the outer trench (TO). A trench-bottom field relaxing region (13) is provided in a drift layer (3). A trench-bottom high-concentration region (18) has an impurity concentration higher than that of the trench-bottom field relaxing region (13), is provided on the trench-bottom field relaxing region (13), and extends from a position where it faces the gate connection layer (14) with the gate insulating film (7) being interposed, to a position where it is in contact with the outer contact (CO) of the first main electrode (10).
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公开(公告)号:US10453951B2
公开(公告)日:2019-10-22
申请号:US15509986
申请日:2015-09-09
发明人: Yutaka Fukui , Yasuhiro Kagawa , Kensuke Taguchi , Nobuo Fujiwara , Katsutoshi Sugawara , Rina Tanaka
IPC分类号: H01L29/78 , H01L23/482 , H01L29/06 , H01L29/40 , H01L29/423 , H01L29/66 , H01L29/10 , H01L29/16 , H01L29/739
摘要: A trench-gate semiconductor device including an outside trench, increases reliability of an insulating film at a corner of an open end of the outside trench. The semiconductor device includes: a gate trench reaching an inner part of an n-type drift layer in a cell region; an outside trench outside the cell region; a gate electrode formed inside the gate trench through a gate insulating film; a gate line formed inside the outside trench through an insulating film; and a gate line leading portion formed through the insulating film to cover a corner of an open end of the outside trench closer to the cell region, and electrically connecting the gate electrode to the gate line, and the surface layer of the drift layer in contact with the corner has a second impurity region of p-type that is a part of the well region.
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7.
公开(公告)号:US10431658B2
公开(公告)日:2019-10-01
申请号:US15902116
申请日:2018-02-22
IPC分类号: H01L29/417 , H01L29/78 , H01L29/06 , H01L29/10 , H01L29/16
摘要: A gate trench and a protective trench are provided on a top surface of the silicon carbide semiconductor layer of a first conductivity type. A protective diffusion layer of a second conductivity type is provided at a position deeper than the gate electrode in the silicon carbide semiconductor layer. An inter-layer insulating film covers a surface of the gate electrode and includes a cell opening. A source electrode is electrically connected to the source region via the cell opening and electrically connected to the protective diffusion layer via the protective trench. A plated film is provided on the source electrode. A concave part is provided on a top surface of the source electrode above the protective trench. A depth in a vertical direction of the concave part is equal to or less than half of a width in a horizontal direction of the concave part.
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公开(公告)号:US11894428B2
公开(公告)日:2024-02-06
申请号:US17427090
申请日:2019-03-18
发明人: Hideyuki Hatta , Rina Tanaka , Katsutoshi Sugawara , Yutaka Fukui
IPC分类号: H01L29/16 , H01L29/872
CPC分类号: H01L29/1608 , H01L29/872
摘要: The present invention relates to a silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor and includes a first trench provided through first and second semiconductor regions in a thickness direction and reaches inside a semiconductor layer, a second trench provided through the second semiconductor region in the thickness direction and reaches inside the semiconductor layer, a gate electrode embedded in the first trench via a gate insulating film, a Schottky barrier diode electrode embedded in the second trench, a first low-resistance layer having contact with a trench side wall of the first trench, and a second low-resistance layer having contact with a trench side wall of the second trench. The second low-resistance layer has an impurity concentration that is higher than the impurity concentration in the semiconductor layer and lower than the impurity concentration in the first low-resistance layer.
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公开(公告)号:US11355629B2
公开(公告)日:2022-06-07
申请号:US16480676
申请日:2017-03-07
IPC分类号: H01L29/78 , H01L29/06 , H01L29/417 , H01L29/739 , H01L29/66 , H01L29/423 , H01L29/12 , H02M7/5387 , H01L29/16 , H01L29/20
摘要: A silicon carbide semiconductor device includes a diffusion protective layer provided below a gate insulating film, a gate line provided on an insulation film on the bottom face of a terminal trench and electrically connected to a gate electrode, the terminal trench being located more toward the outer side than the gate trench, a gate pad joined to the gate line in the terminal trench, a terminal protective layer provided below the insulation film on the bottom face of the terminal trench, and a source electrode electrically connected to a source region, the diffusion protective layer, and the terminal protective layer. The diffusion protective layer has first extensions that extend toward the terminal protective layer and that are separated from the terminal protective layer. This configuration inhibits an excessive electric field from being applied to the gate insulating film provided on the bottom face of the gate trench.
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公开(公告)号:US11158704B2
公开(公告)日:2021-10-26
申请号:US16090784
申请日:2017-01-18
发明人: Kohei Adachi , Katsutoshi Sugawara , Yutaka Fukui , Rina Tanaka , Kazuya Konishi
摘要: A semiconductor device including: a trench gate; a trench-bottom protecting layer of a second conductivity type provided in a semiconductor layer of a first conductivity type while contacting a bottom of trenches; and a depletion suppressing layer of the first conductivity type provided between adjacent trench-bottom protecting layers, wherein the depletion suppressing layer includes an intermediate point that is horizontally equidistant to the adjacent trench-bottom protecting layers and is formed of a size to contact neither the trenches nor the trench-bottom protecting layers, and an impurity concentration of the depletion suppressing layer is set higher than an impurity concentration of the semiconductor layer.
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