公开(公告)号：US10714571B2

公开(公告)日：2020-07-14

申请号：US16303797

申请日：2017-05-19

申请人： Mitsubishi Electric Corporation

发明人： Akihiro Koyama ,  Kohei Ebihara

IPC分类号： H01L29/16 ,  H01L29/06 ,  H01L29/12 ,  H01L29/47 ,  H01L29/78 ,  H01L29/87 ,  H01L29/40 ,  H01L29/872 ,  H01L21/02

摘要： A semiconductor layer having n-type is made of silicon carbide, and has an element region and a terminal region. A plurality of field limiting ring regions having p-type are provided in the terminal region of the semiconductor layer, and are arranged spaced apart from one another. A field insulating film is provided in the terminal region of the semiconductor layer, and is in contact with the field limiting ring regions and the semiconductor layer. Each of the field limiting regions includes a halogen-containing field limiting ring part in contact with the field insulating film and containing halogen family atoms.

公开(公告)号：US10529799B2

公开(公告)日：2020-01-07

申请号：US16309504

申请日：2017-06-02

申请人： Mitsubishi Electric Corporation

发明人： Masayuki Furuhashi ,  Kohei Ebihara

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/16 ,  H01L29/08 ,  H01L21/04 ,  H01L29/36 ,  H01L29/10 ,  H01L21/02 ,  H01L29/49

摘要： A semiconductor device includes a semiconductor substrate, and a semiconductor layer disposed on the semiconductor substrate. First and second pillar layers, of respective first and second conductivity types, are alternately provided in a direction in parallel with a main surface in an active region of the semiconductor layer and in a termination region. A pillar pitch in the termination region is set to be larger than a pillar pitch in the active region. A product of a width of one of the first pillar layers and effective impurity concentration of the first conductivity of the one of the first pillar layers is equal to a product of a width of one of the second pillar layers and effective impurity concentration of the second conductivity of the one of the second pillar layers.

公开(公告)号：US10516017B2

公开(公告)日：2019-12-24

申请号：US16301300

申请日：2017-06-05

申请人： Mitsubishi Electric Corporation

发明人： Kenji Hamada ,  Kazuya Konishi ,  Kohei Ebihara

IPC分类号： H01L29/10 ,  H01L29/06 ,  H01L29/12 ,  H01L29/78 ,  H01L29/739 ,  H01L21/04 ,  H01L29/16 ,  H01L29/66

摘要： A semiconductor device includes an emitter region, a base contact region, a buried region, and a carrier trap region. The emitter region and the base contact region are selectively disposed in the upper surface of the base region while being adjacent to each other. The buried region is disposed in the drift region below the base contact region or the emitter region. The carrier trap region is disposed between the buried region and the base region, and has a carrier lifetime shorter than that of the drift region. The device can improve latch-up breakdown tolerance.

公开(公告)号：US11508638B2

公开(公告)日：2022-11-22

申请号：US17251819

申请日：2018-08-17

申请人： Mitsubishi Electric Corporation

发明人： Kohei Ebihara

IPC分类号： H01L23/31 ,  H01L23/24 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/872 ,  H02M7/537

摘要： A semiconductor substrate has a first surface and a second surface that includes an inner region and an outer region. The semiconductor substrate includes a drift layer of a first conductivity type and a terminal well region of a second conductivity type. The terminal well region includes a portion that extends from between the inner region and the outer region toward the outer region. A first electrode is on the first surface. A second electrode is on at least part of the inner region and electrically connected to the terminal well region, and has its edge located on a boundary between the inner region and the outer region. A peripheral structure is provided on part of the outer region, away from the second electrode. A surface protective film covers the edge of the second electrode and at least part of the outer region and has the peripheral structure engaged therein.

公开(公告)号：US11094815B2

公开(公告)日：2021-08-17

申请号：US16492610

申请日：2018-03-08

申请人： Mitsubishi Electric Corporation

发明人： Kohei Ebihara ,  Naruto Miyakawa

IPC分类号： H01L29/78 ,  H01L29/06

摘要： An object of the present invention is to provide a highly reliable semiconductor device by preventing precipitation of an oxide to prevent peeling of a resin layer. The semiconductor device includes: a resin layer provided so that at least a part of the resin layer extends on a front surface of a semiconductor layer on an outer peripheral side with respect to an outer peripheral end of a field insulating film; and a floating well region spaced apart from a termination well region in a surface layer of the semiconductor layer, the floating well region formed to be in contact with an outer peripheral end of the field insulating film to extend to the outer peripheral side with respect to the outer peripheral end of the field insulating film.

公开(公告)号：US11063122B2

公开(公告)日：2021-07-13

申请号：US16323642

申请日：2017-10-24

申请人： Mitsubishi Electric Corporation

发明人： Yusuke Yamashiro ,  Kazuyuki Sugahara ,  Hiroshi Watanabe ,  Kohei Ebihara

IPC分类号： H01L29/16 ,  H01L29/47 ,  H01L29/78 ,  H01L29/868 ,  H01L29/872 ,  H02M7/5387

摘要： In a termination region of a SiC-MOSFET, suppressing operation of a p-n diode between a well and a drift layer sometimes decreases reliability during high-speed switching. In a termination region of a SiC-MOSFET with a built-in SBD are provided second well region having an impurity concentration lower than the impurity concentration in a well region in an active region, and a high-concentration region that is formed on a surface layer of the second well region, has an impurity concentration higher than the impurity concentration in the well region in the active region, and is ohmic-connected to a source electrode.

公开(公告)号：US11222973B2

公开(公告)日：2022-01-11

申请号：US16082212

申请日：2016-04-11

申请人： Mitsubishi Electric Corporation

发明人： Shiro Hino ,  Koji Sadamatsu ,  Hideyuki Hatta ,  Yuichi Nagahisa ,  Kohei Ebihara

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/12 ,  H01L27/04 ,  H01L27/095 ,  H01L29/10 ,  H01L29/16 ,  H01L29/872

摘要： A technique is provided for effectively suppressing a forward voltage shift due to occurrence of a stacking fault. A semiconductor device relating to the present technique includes a first well region of a second conductivity type, a second well region of the second conductivity type which is so provided as to sandwich the whole of a plurality of first well regions in a plan view and has an area larger than that of each of the first well regions, a third well region of the second conductivity type which is so provided as to sandwich the second well region in a plan view and has an area larger than that of the second well region, and a dividing region of a first conductivity type provided between the second well region and the third well region, having an upper surface which is in contact with an insulator.

公开(公告)号：US10707341B2

公开(公告)日：2020-07-07

申请号：US16316082

申请日：2017-06-26

申请人： Mitsubishi Electric Corporation

发明人： Yukiyasu Nakao ,  Kohei Ebihara ,  Shiro Hino

IPC分类号： H01L29/78 ,  H01L29/47 ,  H01L29/16

摘要： A semiconductor device includes: a plurality of semiconductor switching elements that are a plurality of MOSFETs each including a Schottky barrier diode; a first ohmic electrode disposed above a first region of a well region and electrically connected to the first region, the first region being on the opposite side from a predefined region; a first Schottky electrode disposed on a semiconductor layer exposed at the first region of the well region; and a line electrically connected to the first ohmic electrode, the first Schottky electrode, and a source electrode. The device enables reduction of a breakdown in a gate insulating film.

公开(公告)号：US10593751B2

公开(公告)日：2020-03-17

申请号：US16300348

申请日：2017-04-10

申请人： Mitsubishi Electric Corporation

发明人： Kenji Hamada ,  Kohei Ebihara

IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/12 ,  H01L29/66 ,  H01L21/04 ,  H01L29/16

摘要： An object of the present invention is to provide a semiconductor device capable of satisfactorily securing a breakdown voltage not only in a cell region but also in an edge termination region in a super junction structure. A semiconductor device according to the present invention includes a drift region of a first conductivity type and a pillar region of a second conductivity type a RESURF layer formed across a plurality of the pillar regions in an edge termination region and extending in the thickness direction from surfaces of the drift region and the pillar region, and a high-concentration region of the second conductivity type formed in a surface of the RESURF layer, the high-concentration region being higher in impurity concentration than the RESURF layer, no pillar region being formed under the high-concentration region in the thickness direction.

公开(公告)号：US10297666B2

公开(公告)日：2019-05-21

申请号：US15564389

申请日：2015-04-14

申请人： Mitsubishi Electric Corporation

发明人： Kohei Ebihara ,  Hiroshi Watanabe

IPC分类号： H01L29/16 ,  H01L29/06 ,  H01L29/78 ,  H01L29/872 ,  H01L23/24 ,  H01L29/40 ,  H01L29/861 ,  H01L23/31 ,  H01L29/739

摘要： Supposing x is defined as a position of an end of a depletion layer extending when a rated voltage V [V] is applied to a rear surface electrode, W1 is defined as a distance between the position x and an outer peripheral edge of a surface electrode in an outer peripheral direction, W2 is defined as a distance between the position x and an outer peripheral edge of a field insulating film in the outer peripheral direction, t [μm] is defined as a film thickness t [μm] of the field insulating film, a layout of a terminal part is defined so that an electrical field in the field insulating film at the position x expressed as W2V/t(W1+W2) is 3 MV/cm or smaller.