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公开(公告)号:US10516017B2
公开(公告)日:2019-12-24
申请号:US16301300
申请日:2017-06-05
发明人: Kenji Hamada , Kazuya Konishi , Kohei Ebihara
IPC分类号: H01L29/10 , H01L29/06 , H01L29/12 , H01L29/78 , H01L29/739 , H01L21/04 , H01L29/16 , H01L29/66
摘要: A semiconductor device includes an emitter region, a base contact region, a buried region, and a carrier trap region. The emitter region and the base contact region are selectively disposed in the upper surface of the base region while being adjacent to each other. The buried region is disposed in the drift region below the base contact region or the emitter region. The carrier trap region is disposed between the buried region and the base region, and has a carrier lifetime shorter than that of the drift region. The device can improve latch-up breakdown tolerance.
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公开(公告)号:US10304939B2
公开(公告)日:2019-05-28
申请号:US15030763
申请日:2014-09-02
发明人: Kenji Hamada , Masayuki Imaizumi
IPC分类号: H01L21/04 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/32 , H01L29/66 , H01L21/322 , H01L29/739 , H01L29/744 , H01L29/861 , H01L29/868
摘要: A method for manufacturing a semiconductor device capable of reducing an ON resistance. In the present invention, a drift layer is formed on a substrate. An ion implanted layer is formed in a surface of the drift layer. A surplus carbon region is formed in the drift layer. The drift layer is heated. In a case where the surplus carbon region is formed, the surplus carbon region is formed in a region deeper than an interface between the ion implanted layer and the drift layer. In a case where the drift layer is heated, impurity ions of the ion implanted layer are activated to form an activation layer, and interstitial carbon atoms are dispersed toward the activation layer.
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公开(公告)号:US11282948B2
公开(公告)日:2022-03-22
申请号:US16973057
申请日:2018-08-02
发明人: Yusuke Yamashiro , Kenji Hamada , Kazuya Konishi
IPC分类号: H01L29/73 , H01L29/16 , H01L29/66 , H01L29/739
摘要: Provided is a technique capable of obtaining sufficient latch-up tolerance and enabling integration. The wide band gap semiconductor device includes: a collector region, a charge storage region having an impurity concentration higher than that of the drift region, a base region, a charge extraction region having an impurity concentration higher than that of the base region, an emitter region, a Schottky electrode, a gate insulating film, a gate electrode, an emitter electrode, and a collector electrode.
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公开(公告)号:US09716006B2
公开(公告)日:2017-07-25
申请号:US15316905
申请日:2015-04-10
发明人: Kenji Hamada , Naruhisa Miura , Yosuke Nakanishi
IPC分类号: H01L21/02 , H01L29/66 , C30B29/36 , C30B31/18 , C30B31/22 , H01L21/78 , H01L29/16 , H01L29/78 , H01L21/04
CPC分类号: H01L21/02694 , C30B29/36 , C30B31/185 , C30B31/22 , C30B33/02 , H01L21/02378 , H01L21/02529 , H01L21/046 , H01L21/0465 , H01L21/265 , H01L21/28 , H01L21/7806 , H01L29/0834 , H01L29/0878 , H01L29/1608 , H01L29/66068 , H01L29/7395 , H01L29/78 , H01L29/7802 , H01L29/7813
摘要: A method for manufacturing a semiconductor device, includes: (a) providing a SiC epitaxial substrate in which on a SiC support substrate, a SiC epitaxial growth layer having an impurity concentration equal to or less than 1/10,000 of that of the SiC support substrate and having a thickness of 50 μm or more is disposed; (b) forming an impurity region, which forms a semiconductor element, on a first main surface of the SiC epitaxial substrate by selectively injecting impurity ions; (c) forming an ion implantation region, which controls warpage of the SiC epitaxial substrate, on a second main surface of the SiC epitaxial substrate by injecting predetermined ions; and (d) heating the SiC epitaxial substrate after (b) and (c).
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公开(公告)号:US10593751B2
公开(公告)日:2020-03-17
申请号:US16300348
申请日:2017-04-10
发明人: Kenji Hamada , Kohei Ebihara
摘要: An object of the present invention is to provide a semiconductor device capable of satisfactorily securing a breakdown voltage not only in a cell region but also in an edge termination region in a super junction structure. A semiconductor device according to the present invention includes a drift region of a first conductivity type and a pillar region of a second conductivity type a RESURF layer formed across a plurality of the pillar regions in an edge termination region and extending in the thickness direction from surfaces of the drift region and the pillar region, and a high-concentration region of the second conductivity type formed in a surface of the RESURF layer, the high-concentration region being higher in impurity concentration than the RESURF layer, no pillar region being formed under the high-concentration region in the thickness direction.
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公开(公告)号:US09704947B2
公开(公告)日:2017-07-11
申请号:US14890557
申请日:2014-05-02
发明人: Kohei Ebihara , Naruhisa Miura , Kenji Hamada , Koji Okuno
IPC分类号: H01L29/06 , H01L29/66 , H01L29/872 , H01L29/16 , H01L21/04 , H01L21/765
CPC分类号: H01L29/0619 , H01L21/0465 , H01L21/765 , H01L29/0692 , H01L29/1608 , H01L29/6606 , H01L29/872
摘要: A semiconductor device including a terminal region that can suppress a resist collapse in manufacturing and effectively relieve a concentration of electric fields and a method for manufacturing the semiconductor device. The semiconductor device includes a semiconductor element formed in a semiconductor substrate made of a silicon carbide semiconductor of a first conductivity type and a plurality of ring-shaped regions of a second conductivity type formed in the semiconductor substrate while surrounding the semiconductor element in plan view. At least one of the plurality of ring-shaped regions includes one or more separation regions of the first conductivity type that cause areas of the first conductivity type on an inner side and an outer side of one of the ring-shaped regions to communicate with each other in plan view.
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公开(公告)号:US12080705B2
公开(公告)日:2024-09-03
申请号:US17609783
申请日:2019-07-12
发明人: Kenji Hamada , Kazuya Konishi , Kotaro Kawahara
IPC分类号: H01L27/06 , H01L29/06 , H01L29/66 , H01L29/739
CPC分类号: H01L27/0629 , H01L29/0696 , H01L29/66333 , H01L29/7394
摘要: In order to improve energization capacity, minority carrier injection efficiency is increased. In a semiconductor device, an IGBT includes a first drift layer, a collector region, a base region, an emitter region, an insulating film, a gate electrode, and a first high carrier lifetime region formed at a position closer to the collector region than the base region and having a longer carrier lifetime than the first drift layer. An FWD includes a second drift layer, an anode region, and a second high carrier lifetime region formed at a position closer to the anode region than a lower surface of the second drift layer and having a longer carrier lifetime than the second drift layer.
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公开(公告)号:US09640610B2
公开(公告)日:2017-05-02
申请号:US15109597
申请日:2015-02-06
发明人: Kenji Hamada , Naruhisa Miura
IPC分类号: H01L29/15 , H01L29/06 , H01L29/66 , H01L29/739 , H01L29/16 , H01L21/265 , H01L29/32 , H01L21/04 , H01L27/06 , H01L29/10 , H01L29/08
CPC分类号: H01L29/063 , H01L21/046 , H01L21/26506 , H01L27/0664 , H01L27/0727 , H01L29/0834 , H01L29/1095 , H01L29/1608 , H01L29/32 , H01L29/66068 , H01L29/7395 , H01L29/7397
摘要: An IGBT includes an emitter electrode, base regions, an emitter region, a collector region, a collector electrode, a gate insulating film provided in contact with the silicon carbide semiconductor region, the emitter region, and the base region, and a gate electrode that faces the gate insulating film. A FWD includes a base contact region provided adjacent to the emitter region and electrically connected to the emitter electrode, and a cathode region disposed in the upper layer part on the other main surface side of the silicon carbide semiconductor region, provided adjacent to the collector region, and electrically connected to the collector electrode. The IGBT further includes a reduced carrier-trap region disposed in a principal current-carrying region of the silicon carbide semiconductor region located above the collector region and having a smaller number of carrier traps than the silicon carbide semiconductor region located above the cathode region.
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