公开(公告)号：US09117896B2

公开(公告)日：2015-08-25

申请号：US14295532

申请日：2014-06-04

申请人： Mitsubishi Electric Corporation

发明人： Hiroyuki Okazaki ,  Yoshitaka Kamo ,  Yoichi Nogami ,  Hidetoshi Koyama ,  Shinichi Miyakuni

IPC分类号： H01L29/76 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L29/20

CPC分类号： H01L29/78 ,  H01L23/3677 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/66522 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0≦x≦1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0≦y≦1, x≠y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.

摘要翻译： 半导体器件包括：具有面向相反方向的第一和第二主表面的Si衬底; 在Si衬底的第一主表面上形成Al x Ga 1-x N（0＆nlE; x＆nlE; 1）的缓冲层; 缓冲层上的AllyGa1-yN（0＆nlE; y＆nlE; 1，x≠y）的外延生长晶体层; 在外延生长的晶体层上的晶体管; 和Al x Ga 1-x N的填料，并且具有与缓冲层相同的x。 Si衬底中的通孔从第二主表面延伸到缓冲层，并且通孔填充有填充物。

公开(公告)号：US09805978B2

公开(公告)日：2017-10-31

申请号：US15338775

申请日：2016-10-31

申请人： Mitsubishi Electric Corporation

发明人： Kohei Miki ,  Kazuyuki Onoe ,  Shinichi Miyakuni

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L21/04 ,  H01L21/027 ,  H01L21/683

CPC分类号： H01L21/76898 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0475 ,  H01L21/3081 ,  H01L21/31133 ,  H01L21/6835 ,  H01L21/6836 ,  H01L29/2003 ,  H01L29/4175 ,  H01L2221/68372 ,  H01L2221/68381

摘要： A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.

公开(公告)号：US20150084103A1

公开(公告)日：2015-03-26

申请号：US14295532

申请日：2014-06-04

申请人： Mitsubishi Electric Corporation

发明人： Hiroyuki Okazaki ,  Yoshitaka Kamo ,  Yoichi Nogami ,  Hidetoshi Koyama ,  Shinichi Miyakuni

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/78 ,  H01L23/3677 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/66522 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0≦x≦1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0≦y≦1, x≠y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.

摘要翻译： 半导体器件包括：具有面向相反方向的第一和第二主表面的Si衬底; 在Si衬底的第一主表面上形成Al x Ga 1-x N（0＆nlE; x＆nlE; 1）的缓冲层; 缓冲层上的AllyGa1-yN（0＆nlE; y＆nlE; 1，x≠y）的外延生长晶体层; 在外延生长的晶体层上的晶体管; 和Al x Ga 1-x N的填料，并且具有与缓冲层相同的x。 Si衬底中的通孔从第二主表面延伸到缓冲层，并且通孔填充有填充物。

公开(公告)号：US11881516B2

公开(公告)日：2024-01-23

申请号：US17287709

申请日：2018-12-27

申请人： Mitsubishi Electric Corporation

发明人： Kohei Miki ,  Shinichi Miyakuni ,  Kohei Nishiguchi

IPC分类号： H01L29/45 ,  H01L23/48 ,  H01L21/8252 ,  H01L27/07 ,  H01L21/768 ,  H01L49/02

CPC分类号： H01L29/454 ,  H01L23/481 ,  H01L28/60

摘要： Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.

公开(公告)号：US09773703B2

公开(公告)日：2017-09-26

申请号：US15338775

申请日：2016-10-31

申请人： Mitsubishi Electric Corporation

发明人： Kohei Miki ,  Kazuyuki Onoe ,  Shinichi Miyakuni

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L21/04 ,  H01L21/027 ,  H01L21/683

摘要： A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.