公开(公告)号：US20110222348A1

公开(公告)日：2011-09-15

申请号：US13035369

申请日：2011-02-25

申请人： Moosung Kim ,  Sungsoo Lee

发明人： Moosung Kim ,  Sungsoo Lee

IPC分类号： G11C16/10

CPC分类号： G11C16/3418 ,  G11C16/0483 ,  G11C16/10

摘要： Nonvolatile memory devices include a two-dimensional array of nonvolatile memory cells having a plurality of memory cells of unequal size therein. These memory cells may include those that have unequal channel widths associated with respective word lines and those having unequal channel lengths associated with respective bit lines that are connected to corresponding strings of nonvolatile memory cells (e.g., NAND-type strings). Control circuitry is also provided that is electrically coupled to the two-dimensional array of nonvolatile memory cells. This control circuitry may operate to concurrently program first and second nonvolatile memory cells having unequal sizes from an erased state (e.g., logic 1) to an equivalent programmed state (e.g., logic 0). This is done by establishing unequal first and second word line-to-channel region voltages in the first and second nonvolatile memory cells, respectively, during an operation to program a row of memory cells in the two-dimensional array of nonvolatile memory cells, which includes the first and second nonvolatile memory cells of unequal size.

摘要翻译： 非易失性存储器件包括其中具有不同尺寸的多个存储单元的非易失性存储单元的二维阵列。 这些存储器单元可以包括具有与相应字线相关联的不相等通道宽度的那些存储器单元，以及具有与连接到非易失性存储器单元（例如，NAND型串）的相应串的各个位线相关联的不相等的通道长度的存储器单元）。 还提供了电耦合到非易失性存储器单元的二维阵列的控制电路。 该控制电路可以操作以将具有不同大小的第一和第二非易失性存储器单元从擦除状态（例如，逻辑1）同时编程为等效的编程状态（例如，逻辑0）。 这是通过在对非易失性存储器单元的二维阵列中的一行存储器单元进行编程的操作期间分别在第一和第二非易失性存储器单元中建立不相等的第一和第二字线到沟道区域电压来实现的， 包括不等大小的第一和第二非易失性存储单元。

公开(公告)号：US08630124B2

公开(公告)日：2014-01-14

申请号：US13035369

申请日：2011-02-25

申请人： Moosung Kim ,  Sungsoo Lee

发明人： Moosung Kim ,  Sungsoo Lee

IPC分类号： G11C11/40

CPC分类号： G11C16/3418 ,  G11C16/0483 ,  G11C16/10

摘要： Nonvolatile memory devices include a two-dimensional array of nonvolatile memory cells having a plurality of memory cells of unequal size therein. These memory cells may include those that have unequal channel widths associated with respective word lines and those having unequal channel lengths associated with respective bit lines that are connected to corresponding strings of nonvolatile memory cells (e.g., NAND-type strings). Control circuitry is also provided that is electrically coupled to the two-dimensional array of nonvolatile memory cells. This control circuitry may operate to concurrently program first and second nonvolatile memory cells having unequal sizes from an erased state (e.g., logic 1) to an equivalent programmed state (e.g., logic 0). This is done by establishing unequal first and second word line-to-channel region voltages in the first and second nonvolatile memory cells, respectively, during an operation to program a row of memory cells in the two-dimensional array of nonvolatile memory cells, which includes the first and second nonvolatile memory cells of unequal size.

摘要翻译： 非易失性存储器件包括其中具有不同尺寸的多个存储单元的非易失性存储单元的二维阵列。 这些存储器单元可以包括具有与相应字线相关联的不相等通道宽度的那些存储器单元，以及具有与连接到非易失性存储器单元（例如，NAND型串）的相应串的各个位线相关联的不相等的通道长度的存储器单元）。 还提供了电耦合到非易失性存储器单元的二维阵列的控制电路。 该控制电路可以操作以将具有不同大小的第一和第二非易失性存储器单元从擦除状态（例如，逻辑1）同时编程为等效的编程状态（例如，逻辑0）。 这是通过在对非易失性存储器单元的二维阵列中的一行存储器单元进行编程的操作期间分别在第一和第二非易失性存储器单元中建立不等的第一和第二字线到沟道区域电压来实现的， 包括不等大小的第一和第二非易失性存储单元。

公开(公告)号：US08081508B2

公开(公告)日：2011-12-20

申请号：US12577876

申请日：2009-10-13

申请人： Moosung Kim ,  Sungsoo Lee

发明人： Moosung Kim ,  Sungsoo Lee

IPC分类号： G11C11/34

CPC分类号： G11C16/10 ,  G11C5/143 ,  G11C5/147 ,  G11C16/12 ,  G11C16/3427 ,  G11C16/3454

摘要： Provided is a flash memory device. The flash memory device includes a memory cell array, and a voltage generator. The memory cell array is connected to a plurality of word lines. The voltage generator generates a program voltage which is supplied to a selected word line of the word lines and a pass voltage which is supplied to a non-selected word line of the word lines, in a program operation. The voltage generator varies a level of the pass voltage with a temperature.

摘要翻译： 提供了一种闪存设备。 闪存器件包括存储单元阵列和电压发生器。 存储单元阵列连接到多个字线。 电压发生器在编程操作中产生提供给字线的选定字线的编程电压和提供给字线的未选择字线的通过电压。 电压发生器通过温度改变通过电压的电平。

公开(公告)号：US20100110793A1

公开(公告)日：2010-05-06

申请号：US12577876

申请日：2009-10-13

申请人： Moosung Kim ,  Sungsoo Lee

发明人： Moosung Kim ,  Sungsoo Lee

IPC分类号： G11C16/04 ,  G11C5/14

CPC分类号： G11C16/10 ,  G11C5/143 ,  G11C5/147 ,  G11C16/12 ,  G11C16/3427 ,  G11C16/3454

摘要： Provided is a flash memory device. The flash memory device includes a memory cell array, and a voltage generator. The memory cell array is connected to a plurality of word lines. The voltage generator generates a program voltage which is supplied to a selected word line of the word lines and a pass voltage which is supplied to a non-selected word line of the word lines, in a program operation. The voltage generator varies a level of the pass voltage with a temperature.

摘要翻译： 提供了一种闪存设备。 闪存器件包括存储单元阵列和电压发生器。 存储单元阵列连接到多个字线。 电压发生器在编程操作中产生提供给字线的选定字线的编程电压和提供给字线的未选择字线的通过电压。 电压发生器通过温度改变通过电压的电平。

公开(公告)号：US08238185B2

公开(公告)日：2012-08-07

申请号：US12608295

申请日：2009-10-29

申请人： Seungjae Lee ,  Sungsoo Lee

发明人： Seungjae Lee ,  Sungsoo Lee

IPC分类号： G11C7/04

CPC分类号： G11C16/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

摘要： Provided is a semiconductor memory device. The semiconductor memory device includes: a voltage generator adjusting a DC voltage supplied into the semiconductor memory device according to a current temperature; and a control logic activating a temperature detection operation of the voltage generator and an adjustment operation of the DC voltage according to an operation mode, wherein the voltage generator adjusts the DC voltage according to offset information about the semiconductor memory device.

摘要翻译： 提供了一种半导体存储器件。 半导体存储器件包括：电压发生器，根据当前温度调节提供给半导体存储器件的直流电压; 以及根据操作模式激活所述电压发生器的温度检测操作和所述DC电压的调节操作的控制逻辑，其中所述电压发生器根据关于所述半导体存储器件的偏移信息来调节所述DC电压。

公开(公告)号：US20100110786A1

公开(公告)日：2010-05-06

申请号：US12585870

申请日：2009-09-28

申请人： Dongku Kang ,  Sungsoo Lee

发明人： Dongku Kang ,  Sungsoo Lee

IPC分类号： G11C16/06 ,  G11C7/04 ,  G11C5/14 ,  G11C7/06 ,  G11C29/00

CPC分类号： G11C7/04 ,  G11C16/0483 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028

摘要： Provided are a nonvolatile memory device and a memory test system. The nonvolatile memory device includes a temperature compensator to calculate a trim value for regulating a characteristic of the nonvolatile memory device that varies with temperature in response to a test signal. The memory test system includes a plurality of nonvolatile memories and a tester. Each of the nonvolatile memories includes a temperature compensator. The tester tests the plurality of nonvolatile memories. The temperature compensator calculates a trim value for regulating a characteristic of the nonvolatile memory device that varies with temperature in response to a test signal of the tester.

摘要翻译： 提供了非易失性存储器件和存储器测试系统。 非易失性存储器件包括温度补偿器，用于根据测试信号计算用于调节随温度变化的非易失性存储器件的特性的微调值。 存储器测试系统包括多个非易失性存储器和测试器。 每个非易失性存储器包括温度补偿器。 测试仪测试多个非易失性存储器。 温度补偿器根据测试仪的测试信号计算用于调节随温度变化的非易失性存储器件的特性的微调值。

公开(公告)号：US20100110815A1

公开(公告)日：2010-05-06

申请号：US12608295

申请日：2009-10-29

申请人： Seungjae Lee ,  Sungsoo Lee

发明人： Seungjae Lee ,  Sungsoo Lee

IPC分类号： G11C7/04 ,  G11C5/14

CPC分类号： G11C16/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

摘要： Provided is a semiconductor memory device. The semiconductor memory device includes: a voltage generator adjusting a DC voltage supplied into the semiconductor memory device according to a current temperature; and a control logic activating a temperature detection operation of the voltage generator and an adjustment operation of the DC voltage according to an operation mode, wherein the voltage generator adjusts the DC voltage according to offset information about the semiconductor memory device.

摘要翻译： 提供了一种半导体存储器件。 半导体存储器件包括：电压发生器，根据当前温度调节提供给半导体存储器件的直流电压; 以及根据操作模式激活所述电压发生器的温度检测操作和所述DC电压的调节操作的控制逻辑，其中所述电压发生器根据关于所述半导体存储器件的偏移信息来调节所述DC电压。