公开(公告)号：US11948719B2

公开(公告)日：2024-04-02

申请号：US17684950

申请日：2022-03-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Frédéric Voiron ,  Mohamed Mehdi Jatlaoui ,  Julien El Sabahy

IPC: H01F27/24 ,  H01F27/28 ,  H01F41/02

CPC classification number: H01F27/24 ,  H01F27/28 ,  H01F41/0206

Abstract: A nanomagnetic inductor core that includes: a porous, electrically-insulating template having high-permeability material in the pores thereof to constitute elongated nanowires, and wherein the elongated nanowires are segmented along their axial direction; and a segment of dielectric material interposed between adjacent segments of the high-permeability material along the axial direction of the nanowire; wherein each segment of the high-permeability material has a length, in the axial direction of the nanowire, no greater than a size of a single magnetic domain, and wherein a maximal cross-sectional dimension of the nanowire is no greater than the size of the single magnetic domain. Inductors and LC interposers using such nanomagnetic inductor cores, as well as associated fabrication methods.

公开(公告)号：US11087927B2

公开(公告)日：2021-08-10

申请号：US16739397

申请日：2020-01-10

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Frédéric Voiron ,  Julien El Sabahy ,  Guy Parat

IPC: C25D11/02 ,  H01G4/33 ,  G01N27/22 ,  H01L21/48 ,  H01L23/498 ,  H01L25/16 ,  H01L49/02 ,  H01L23/00

Abstract: A substrate that includes a base layer having a first principal surface defining a plurality of first trenches and intervening first lands, and a cover layer provided over the first principal surface of the base layer and covering the first trenches and first lands substantially conformally, wherein the surface of the cover layer remote from the first principal surface of the base layer comprises a plurality of second trenches and intervening second lands defined at a smaller scale than the first trenches and first lands. The substrate may be used to fabricate a capacitive element in which thin film layers are provided and conformally cover the second trenches and second lands of the cover layer, to create a metal-insulator-metal structure having high capacitance density.

公开(公告)号：US20210074477A1

公开(公告)日：2021-03-11

申请号：US16951353

申请日：2020-11-18

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Sami Oukassi ,  Raphaël Salot ,  Frédéric Voiron ,  Valentin Sallaz

IPC: H01G4/10 ,  H01L49/02 ,  H01G11/46 ,  H01G11/26

Abstract: An integrated energy storage component that includes a substrate supporting a contoured layer having a region with a contoured surface such as elongated pores. A stack structure is provided conformally over the contoured surface of this region. The stack is a single or repeated instance of MOIM layers, or MIOM layers, the M layers being metal layers, or a quasi-metal such as TiN, the O layers being oxide layers containing ions, and the I layer being an ionic dielectric. The regions having a contoured surface may be formed of porous anodized alumina.

公开(公告)号：US20210032766A1

公开(公告)日：2021-02-04

申请号：US17075154

申请日：2020-10-20

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Frédéric Voiron ,  Julien El Sabahy ,  Maxime Lemenager ,  Guy Parat

IPC: C25D11/02 ,  H01L49/02 ,  C25D11/04 ,  C25D11/06 ,  C25D11/18 ,  H01L23/532 ,  H01L23/522

Abstract: A semiconductor device that includes a porous anodic region for embedding a structure. The porous anodic region is defined by a ductile hard mask. The ductility of the hard mask reduces the potential for the hard mask to crack during the formation by anodization of the porous anodic region. The ductile hard mask may be a metal. The metal may be selected to form a stable oxide when exposed to the anodization electrolyte thereby enabling the hard mask to self-repair if a crack occurs during the anodization process.

公开(公告)号：US20240213018A1

公开(公告)日：2024-06-27

申请号：US18394137

申请日：2023-12-22

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Brigitte SOULIER ,  Sophie Archambault ,  Frédéric Voiron ,  Floriane Baudin ,  Sébastien Dominguez

IPC: H01L21/02

CPC classification number: H01L21/02258 ,  H01L28/60 ,  H01L21/02178

Abstract: A method of manufacturing an integrated device that includes: forming, on a substrate, a metal anodization barrier layer; planarizing the metal anodization barrier layer; forming, on the planarized metal anodization barrier layer, an anodizable metal layer; planarizing the anodizable metal layer; and anodizing the planarized anodizable metal layer to obtain an anodic porous oxide region having a plurality of substantially straight pores that extend from a top surface of the anodic porous oxide region towards the metal anodization barrier layer.

公开(公告)号：US11978766B2

公开(公告)日：2024-05-07

申请号：US17496185

申请日：2021-10-07

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Frédéric Voiron ,  Julien El Sabahy ,  Hiroshi Nakagawa ,  Naoki Iwaji ,  Guy Parat

IPC: H01G4/12 ,  H01G4/012 ,  H01G4/30 ,  H01G4/33 ,  H01L23/00 ,  H01L29/00 ,  H01L49/02

CPC classification number: H01L28/92 ,  H01G4/012 ,  H01G4/306 ,  H01G4/33 ,  H01L28/88

Abstract: Three-dimensional capacitive structures may be produced by forming a capacitive stack conformally over pores in a region of porous anodic oxide. The porous anodic oxide region is provided on a stack of electrically-conductive layers including an anodization-resistant layer and an interconnection layer. In the pores there is a position having restricted diameter quite close to the pore bottom. In a first percentage of the pores in the region of anodic oxide, a functional portion of the capacitive stack is formed so as to extend into the pores no further than the restricted-diameter position. Cracks that may be present in the anodization-resistant layer have reduced effect on the properties of the capacitive structure. Increased thickness of the anodization-resistant layer can be tolerated, enabling equivalent series resistance of the overall capacitive structure to be reduced.

公开(公告)号：US11955568B2

公开(公告)日：2024-04-09

申请号：US17831050

申请日：2022-06-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Larry Buffle ,  Frédéric Voiron ,  Sophie Archambault

IPC: H01L29/94 ,  H01L49/02

CPC classification number: H01L29/945 ,  H01L28/75 ,  H01L28/90 ,  H01L28/91

Abstract: A capacitor structure that includes a silicon substrate having a trench structure formed therein; a dielectric disposed over a surface of the trench structure, conformal to the surface of the trench structure; and a filling layer disposed over the dielectric layer and into the trench structure, the filling layer including a conductive layer and a polymer layer.

公开(公告)号：US20210332492A1

公开(公告)日：2021-10-28

申请号：US17370246

申请日：2021-07-08

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Frédéric Voiron ,  Brigitte Soulier ,  Guy Parat

IPC: C25D11/04 ,  H01L23/522 ,  H01L49/02 ,  C25D11/02

Abstract: A structure that includes: an insulating layer; a first metal layer above a first portion of the insulating layer; a first porous region of anodic oxide, above and in contact with the first metal layer; and a second porous region of anodic oxide, surrounding the first porous region, in contact with a second portion of the insulating layer adjacent to the first portion of the insulating layer, and in contact with the first metal layer, the second porous region forming an insulating region.

公开(公告)号：US11862834B2

公开(公告)日：2024-01-02

申请号：US17130715

申请日：2020-12-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Frédéric Voiron ,  Mohamed Mehdi Jatlaoui

IPC: H01L23/66 ,  H01P1/20 ,  H02M1/44 ,  H01L27/01

CPC classification number: H01P1/20 ,  H01L23/66 ,  H02M1/44 ,  H01L27/016 ,  H01L2223/6627

Abstract: A distributed LC filter structure is disclosed. The distributed LC filter structure provides simultaneously a distributed inductance and a distributed capacitance in the same structure. Accordingly, discrete passive elements are eliminated and high, homogenous integration is achieved. Interconnections between the distributed inductance and the distributed capacitance are tailored to leverage a parasitic inductance of the distributed capacitance to increase the overall inductance of the distributed LC filter structure. Similarly, the interconnections are tailored to leverage a parasitic capacitance resulting from the distributed inductance to add up with the distributed capacitance augmenting the overall capacitance of the structure.

公开(公告)号：US11705484B2

公开(公告)日：2023-07-18

申请号：US17326642

申请日：2021-05-21

Applicant: Murata Manufacturing Co., Ltd. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Julien El Sabahy ,  Frédéric Voiron ,  Paul-Henri Haumesser ,  Pierre Noe ,  Guy Parat

IPC: H01G4/008 ,  H01G4/012 ,  H01G4/33 ,  B82Y10/00 ,  B82Y40/00 ,  H01L49/02

CPC classification number: H01L28/91 ,  H01G4/008 ,  H01G4/012 ,  H01G4/33 ,  H01L28/92 ,  B82Y10/00 ,  B82Y40/00

Abstract: A nanowire structure that includes a conductive layer; conductive wires having first ends that contact the conductive layer and second ends that protrude from the conductive layer; and a lateral bridge layer that connects laterally a number of the conductive wires to provide a substantially uniform spacing between the conductive wires.