公开(公告)号：US09679860B2

公开(公告)日：2017-06-13

申请号：US15070094

申请日：2016-03-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Isao Obu ,  Shinya Osakabe

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/768 ,  H01L23/13 ,  H01L23/498 ,  H03H9/05

CPC classification number: H01L24/14 ,  H01L21/76885 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/11462 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2924/12042 ,  H01L2924/30101 ,  H01L2924/351 ,  H03F1/56 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/451 ,  H03H9/0514 ,  H03H9/059 ,  H01L2924/00

Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.

公开(公告)号：US09343360B2

公开(公告)日：2016-05-17

申请号：US14096044

申请日：2013-12-04

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Isao Obu ,  Shinya Osakabe

IPC: H01L23/538 ,  H01L21/768 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H03H9/05

CPC classification number: H01L24/14 ,  H01L21/76885 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/11462 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2924/12042 ,  H01L2924/30101 ,  H01L2924/351 ,  H03F1/56 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/451 ,  H03H9/0514 ,  H03H9/059 ,  H01L2924/00

Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.

Abstract translation: 配有凸块的电子部件包括电路基板和设置在电路基板的主表面上并且在与主表面平行或基本平行的方向上具有不同横截面积的第一和第二凸块。 具有较小横截面积的第一和第二凸块中的一个包括沿与主表面垂直或基本垂直的方向设置的高度调节层。