公开(公告)号：US12027489B2

公开(公告)日：2024-07-02

申请号：US18282005

申请日：2022-03-14

Applicant: NANO-X IMAGING LTD

Inventor： Ukyo Jeong ,  Ghiyuun Kang

IPC: H01L23/00 ,  H01J9/02 ,  H01J35/06

CPC classification number: H01L24/83 ,  H01J9/025 ,  H01J35/065 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/06 ,  H01L2224/05073 ,  H01L2224/05155 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/27442 ,  H01L2224/29139 ,  H01L2224/32227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83201 ,  H01L2224/83444 ,  H01L2224/8384 ,  H01L2224/92247

Abstract: A method for fabricating silicon die stacks for electron emitter chips by applying sintering to bind a silicon substrate die to other die layers. Metal powder is applied to the bonding surface of the die, covered with the chip carrier or chip and compressed between two heated plates. The bonding pads of the die may be conductively coupled to corresponding bonding pads of the other die layers.