公开(公告)号：US10453997B2

公开(公告)日：2019-10-22

申请号：US15763375

申请日：2016-09-21

Applicant: NICHIA CORPORATION

Inventor： Koji Asada ,  Tokutaro Okabe

IPC: H01L33/32 ,  H01L33/06 ,  H01L33/14 ,  H01L33/36 ,  H01L33/02

Abstract: A nitride semiconductor light emitting element includes: an n-side layer; a p-side layer; an active layer including: a well layer containing Al, Ga, and N, and a barrier layer containing Al, Ga, and N, wherein an Al content of the barrier layer is higher than that of the well layer; and an electron blocking structure layer between the active layer and the p-side layer and including: a first electron blocking layer disposed between the p-side layer and the active layer and having a bandgap larger than that of the barrier layer, a second electron blocking layer disposed between the p-side layer and the first electron blocking layer and having a bandgap larger than that of the barrier layer, but smaller than the bandgap of the first electron blocking layer, and an intermediate layer disposed therebetween and having a bandgap smaller than that of the second electron blocking layer.

公开(公告)号：US10686098B2

公开(公告)日：2020-06-16

申请号：US16546204

申请日：2019-08-20

Applicant: NICHIA CORPORATION

Inventor： Koji Asada ,  Tokutaro Okabe

IPC: H01L33/14 ,  H01L33/32 ,  H01L33/06 ,  H01L33/36 ,  H01L33/02

Abstract: A nitride semiconductor light emitting element includes: an n-side layer; a p-side layer; an active layer disposed between the n-side layer and the p-side layer, the active layer comprising: a well layer containing Al, Ga, and N, and a barrier layer containing Al, Ga, and N, wherein an Al content of the barrier layer is higher than an Al content of the well layer; and an electron blocking structure layer between the active layer and the p-side layer, the electron blocking structure comprising: a first electron blocking layer disposed between the p-side layer and the active layer, a second electron blocking layer disposed between the p-side layer and the first electron blocking layer, and an intermediate layer disposed between the first electron blocking layer and the second electron blocking layer.

公开(公告)号：US11101404B2

公开(公告)日：2021-08-24

申请号：US16354056

申请日：2019-03-14

Applicant: NICHIA CORPORATION

Inventor： Yoshinori Miyamoto ,  Tokutaro Okabe ,  Yuya Kagoshima ,  Keisuke Higashitani ,  Chiaki Ozaki

IPC: H01L33/20 ,  H01L33/12 ,  H01L33/32 ,  H01L33/06 ,  H01L33/00

Abstract: A method for manufacturing a semiconductor device includes: preparing a wafer including sapphire, the wafer having an upper surface that includes a first region and a second region, the second region surrounding the first region and located at a position at least 2 μm higher or lower than the first region; and forming a semiconductor layer at the upper surface, the semiconductor layer including at least one layer that comprises AlzGa1−zN (0.03≤z≤0.15).