公开(公告)号：US11764801B2

公开(公告)日：2023-09-19

申请号：US17356552

申请日：2021-06-24

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Shiau-Wen Kao ,  Ying-Chung Chiu

IPC: H03M1/12 ,  H03M1/36 ,  G06F7/544 ,  H03M1/06 ,  H03M1/80 ,  G06F11/10 ,  G06F7/20

CPC classification number: H03M1/368 ,  G06F7/5443 ,  H03M1/069 ,  H03M1/802 ,  G06F7/20 ,  G06F11/1068

Abstract: A computing-in-memory circuit comprises a computing element array and an analog-to-digital conversion circuit. The computing element array is utilized for analog computation operations. The computing element array includes memory cells, a first group of computing elements, and a second group of computing elements. The first group of computing elements provides capacitance for analog computation in response to an input vector and receives data from the plurality of memory cells and the input vector. The second group of computing elements provides capacitance for quantization. Each computing element of the computing element array is based on a switched-capacitors circuit. The analog-to-digital conversion circuit includes a comparator and a conversion control unit. The comparator has a signal terminal, a reference terminal, and a comparison output terminal, wherein the first and second groups of computing elements are selectively coupled to the signal terminal and the reference terminal.

公开(公告)号：US20150022268A1

公开(公告)日：2015-01-22

申请号：US14083455

申请日：2013-11-19

Applicant: Novatek Microelectronics Corp.

Inventor： Shiau-Wen Kao

IPC: H03F3/45

CPC classification number: H03F3/45071 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2203/45396 ,  H03F2203/45511 ,  H03F2203/45522 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45591

Abstract: A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier.

Abstract translation: 提供DC偏移消除电路。 DC偏移消除电路包括第一运算放大器和反馈增益电路。 第一运算放大器包括第一输入跨导级，第二输入跨导级和输出级。 第一输入跨导级的输入端通过第一运算放大器的第一输入端接收第一运算放大器的输入信号。 输出级的输出端通过第一运算放大器的输出端输出第一运算放大器的输出信号。 反馈增益电路的输入端耦合到第一运算放大器的输出端，反馈增益电路的输出端通过第一运算放大器的第二输入端耦合到第二跨导级的输入端 。

公开(公告)号：US09118286B2

公开(公告)日：2015-08-25

申请号：US14083455

申请日：2013-11-19

Applicant: Novatek Microelectronics Corp.

Inventor： Shiau-Wen Kao

IPC: H03F3/45

CPC classification number: H03F3/45071 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2203/45396 ,  H03F2203/45511 ,  H03F2203/45522 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45591

Abstract: A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier.

Abstract translation: 提供DC偏移消除电路。 DC偏移消除电路包括第一运算放大器和反馈增益电路。 第一运算放大器包括第一输入跨导级，第二输入跨导级和输出级。 第一输入跨导级的输入端通过第一运算放大器的第一输入端接收第一运算放大器的输入信号。 输出级的输出端通过第一运算放大器的输出端输出第一运算放大器的输出信号。 反馈增益电路的输入端耦合到第一运算放大器的输出端，反馈增益电路的输出端通过第一运算放大器的第二输入端耦合到第二跨导级的输入端 。