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公开(公告)号：US11704863B2
公开(公告)日：2023-07-18
申请号：US17716599
申请日：2022-04-08
Applicant: NVIDIA Corporation
Inventor： Samuli Laine , Tero Karras , Timo Aila , Robert Ohannessian , William Parsons Newhall, Jr. , Greg Muthler , Ian Kwong , Peter Nelson , John Burgess
CPC classification number: G06T15/06 , G06T15/005
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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公开(公告)号：US11675704B2
公开(公告)日：2023-06-13
申请号：US17483133
申请日：2021-09-23
Applicant: NVIDIA Corporation
Inventor： Greg Muthler , Timo Aila , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06F12/00 , G06F12/0875 , G06T15/06 , G06F16/901
CPC classification number: G06F12/0875 , G06F16/9027 , G06T15/06 , G06T2207/20021
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
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公开(公告)号：US11328472B2
公开(公告)日：2022-05-10
申请号：US17032818
申请日：2020-09-25
Applicant: NVIDIA Corporation
Inventor： Samuli Laine , Tero Karras , Timo Aila , Robert Ohannessian , William Parsons Newhall, Jr. , Greg Muthler , Ian Kwong , Peter Nelson , John Burgess
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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公开(公告)号：US11189075B2
公开(公告)日：2021-11-30
申请号：US16893107
申请日：2020-06-04
Applicant: NVIDIA CORPORATION
Inventor： Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C. Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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公开(公告)号：US11157414B2
公开(公告)日：2021-10-26
申请号：US16101109
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Greg Muthler , Timo Aila , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06F12/00 , G06F12/0875 , G06T15/06 , G06F16/901
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
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Patent Agency Ranking
公开(公告)号：US10825230B2
公开(公告)日：2020-11-03
申请号：US16101148
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Samuli Laine , Tero Karras , Timo Aila , Robert Ohannessian , William Parsons Newhall, Jr. , Greg Muthler , Ian Kwong , Peter Nelson , John Burgess
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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公开(公告)号：US12198255B2
公开(公告)日：2025-01-14
申请号：US18471651
申请日：2023-09-21
Applicant: NVIDIA CORPORATION
Inventor： Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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公开(公告)号：US12124378B1
公开(公告)日：2024-10-22
申请号：US18137421
申请日：2023-04-20
Applicant: NVIDIA Corporation
Inventor： Gregory A. Muthler , Timo Aila , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06F12/00 , G06F12/0875 , G06F16/901 , G06T15/06
CPC classification number: G06F12/0875 , G06F16/9027 , G06T15/06 , G06T2207/20021
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
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公开(公告)号：US12067669B2
公开(公告)日：2024-08-20
申请号：US18198949
申请日：2023-05-18
Applicant: NVIDIA Corporation
Inventor： Samuli Laine , Tero Karras , Timo Aila , Robert Ohannessian , William Parsons Newhall, Jr. , Greg Muthler , Ian Kwong , Peter Nelson , John Burgess
CPC classification number: G06T15/06 , G06T15/005
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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公开(公告)号：US11804000B2
公开(公告)日：2023-10-31
申请号：US17513023
申请日：2021-10-28
Applicant: NVIDIA CORPORATION
Inventor： Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C. Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
CPC classification number: G06T15/06 , G06T15/005 , G06T17/005
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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