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公开(公告)号:US20230197797A1
公开(公告)日:2023-06-22
申请号:US17645280
申请日:2021-12-20
Applicant: NXP B.V.
Inventor: Congyong Zhu , Bernhard Grote , Bruce McRae Green
IPC: H01L29/40 , H01L29/20 , H01L29/778 , H01L21/311 , H01L21/76 , H01L21/765 , H01L29/66
CPC classification number: H01L29/402 , H01L21/765 , H01L21/7605 , H01L21/31116 , H01L29/2003 , H01L29/7786 , H01L29/66462
Abstract: Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.
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公开(公告)号:US20230197839A1
公开(公告)日:2023-06-22
申请号:US17645286
申请日:2021-12-20
Applicant: NXP B.V.
Inventor: Congyong Zhu , Bernhard Grote , Bruce McRae Green
IPC: H01L29/778 , H01L29/66 , H01L29/20
CPC classification number: H01L29/778 , H01L29/66462 , H01L29/2003
Abstract: Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.
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公开(公告)号:US12148820B2
公开(公告)日:2024-11-19
申请号:US17645286
申请日:2021-12-20
Applicant: NXP B.V.
Inventor: Congyong Zhu , Bernhard Grote , Bruce McRae Green
IPC: H01L29/778 , H01L29/20 , H01L29/66
Abstract: Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.
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