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公开(公告)号：US09973000B2
公开(公告)日：2018-05-15
申请号：US15172208
申请日：2016-06-03
Applicant: NXP B.V.
Inventor： Da-Wei Lai , Guido Wouter Willem Quax , Gijs Jan De Raad
CPC classification number: H02H9/046 , H01L27/0255 , H01L27/0262 , H01L27/0266 , H01L27/0285
Abstract: An electrostatic discharge power rail clamp circuit and an integrated circuit including the same. The power rail clamp circuit includes a first power rail, a second power rail and a first node. The circuit further includes an n-channel field effect transistor having a source and drain located in an isolated p-well in a semiconductor substrate. The drain is connected to the first power rail. The source and isolated p-well are connected to the first node. The circuit also includes a capacitor connected between the first node and the second power rail. The circuit further includes a resistor connected between the first power rail and the first node. The circuit also includes an inverter for controlling the gate of the field effect transistor, wherein the inverter has an input connected to the first node. The circuit further a silicon controlled rectifier connected between the first node and the second power rail.
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公开(公告)号：US09704851B2
公开(公告)日：2017-07-11
申请号：US15179162
申请日：2016-06-10
Applicant: NXP B.V.
Inventor： Gijs Jan De Raad , Guido Wouter Willem Quax
CPC classification number: H01L27/0262 , H01L27/0285 , H01L27/0292 , H01L29/7436
Abstract: A silicon controlled rectifier, an electrostatic discharge (ESD) protection circuit including the silicon controlled rectifier and an integrated circuit including the silicon controlled rectifier or ESD protection circuit. The silicon controlled rectifier includes a first region having a first conductivity type and a second region having a second conductivity type located adjacent the first region in a semiconductor substrate. A junction is formed at a boundary between the first region and the second region. Contact regions of the first conductivity type and the second conductivity type located in each of the first region and the second region. A further contact region of the second conductivity type is located in the second region, in between the contact region of the first conductivity type and the junction. The further contact region and the contact region of the second conductivity type in the second region are connected together for biasing the second region.
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公开(公告)号：US20160372921A1
公开(公告)日：2016-12-22
申请号：US15172208
申请日：2016-06-03
Applicant: NXP B.V.
Inventor： Da-Wei Lai , Guido Wouter Willem Quax , Gijs Jan De Raad
CPC classification number: H02H9/046 , H01L27/0255 , H01L27/0262 , H01L27/0266 , H01L27/0285
Abstract: An electrostatic discharge power rail clamp circuit and an integrated circuit including the same. The power rail clamp circuit includes a first power rail, a second power rail and a first node. The circuit further includes an n-channel field effect transistor having a source and drain located in an isolated p-well in a semiconductor substrate. The drain is connected to the first power rail. The source and isolated p-well are connected to the first node. The circuit also includes a capacitor connected between the first node and the second power rail. The circuit further includes a resistor connected between the first power rail and the first node. The circuit also includes an inverter for controlling the gate of the field effect transistor, wherein the inverter has an input connected to the first node. The circuit further a silicon controlled rectifier connected between the first node and the second power rail.
Abstract translation: 一种静电放电电力轨钳位电路及包括该电路的集成电路。 电力轨道钳位电路包括第一电力轨道，第二电力轨道和第一节点。 该电路还包括n沟道场效应晶体管，其源极和漏极位于半导体衬底中的隔离p阱中。 漏极连接到第一个电源轨。 源和隔离p阱连接到第一个节点。 电路还包括连接在第一节点和第二电力轨道之间的电容器。 电路还包括连接在第一电源轨和第一节点之间的电阻器。 电路还包括用于控制场效应晶体管的栅极的反相器，其中反相器具有连接到第一节点的输入端。 电路还包括连接在第一节点和第二电力轨道之间的可控硅整流器。
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