公开(公告)号：US10346339B2

公开(公告)日：2019-07-09

申请号：US14920674

申请日：2015-10-22

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: G06F13/40 ,  H04L12/803 ,  H04L25/02 ,  G06F13/42 ,  H03K5/1252 ,  H03K17/16

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

公开(公告)号：US20140266394A1

公开(公告)日：2014-09-18

申请号：US13839687

申请日：2013-03-15

Applicant: NXP B.V.

Inventor： Gerrit Willem den Besten ,  Madan Vemula ,  Jingsong Zhou

IPC: H03K17/16

CPC classification number: H03K17/162 ,  H03K17/04163 ,  H03K17/693 ,  H03K2217/0018

Abstract: A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a first signal portion (of the AC signal) and with another signal portion diverted by the inherent capacitances associated with the FET. For offsetting the loading caused by the inherent capacitances associated with the FET-based switch, a biasing circuit is configured and arranged to bias the back-gate terminal of the FET transistor with a follower signal.

Abstract translation: 数据链路电路通过通道之间的基于FET的电路切换高速信号。 FET响应于栅极端子处的控制信号，以信号传递模式或另一（阻塞）模式工作。 在通过模式中，通过耦合第一信号部分（AC信号）和与由FET相关联的固有电容转移的另一信号部分，在S-D端子之间通过AC（高速）信号。 为了抵消由与基于FET的开关相关联的固有电容引起的负载，偏置电路被配置和布置成用跟随器信号偏置FET晶体管的背栅极端子。

公开(公告)号：US20160041940A1

公开(公告)日：2016-02-11

申请号：US14920674

申请日：2015-10-22

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: G06F13/40 ,  H03K5/1252 ,  H03K17/16 ,  G06F13/42

CPC classification number: G06F13/4068 ,  G06F13/4282 ,  H03K5/1252 ,  H03K17/161 ,  H04L25/0272 ,  H04L47/125

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Abstract translation: 可以将器件配置为在导电电路路径之间提供隔离，并且将导电电路路径之一选择性地连接到共享接口。 每个导电电路路径可以包括被设计为根据特定协议和对应的信号速度传输信号的驱动器电路。 在一种情况下，共享接口可以是设计用于连接到其他设备的连接器。 其他设备可以被配置为使用使用不同电路路径提供的一个或多个特定协议通过共享接口进行通信。

公开(公告)号：US20140247720A1

公开(公告)日：2014-09-04

申请号：US13783026

申请日：2013-03-01

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: H04L12/56

CPC classification number: G06F13/4068 ,  G06F13/4282 ,  H03K5/1252 ,  H03K17/161 ,  H04L25/0272 ,  H04L47/125

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Abstract translation: 可以将器件配置为在导电电路路径之间提供隔离，并且将导电电路路径之一选择性地连接到共享接口。 每个导电电路路径可以包括被设计为根据特定协议和对应的信号速度传输信号的驱动器电路。 在一种情况下，共享接口可以是设计用于连接到其他设备的连接器。 其他设备可以被配置为使用使用不同电路路径提供的一个或多个特定协议通过共享接口进行通信。

公开(公告)号：US08836408B1

公开(公告)日：2014-09-16

申请号：US13839687

申请日：2013-03-15

Applicant: NXP B.V.

Inventor： Gerrit Willem den Besten ,  Madan Vemula ,  Jingsong Zhou

IPC: H03K17/16 ,  H03K17/30

CPC classification number: H03K17/162 ,  H03K17/04163 ,  H03K17/693 ,  H03K2217/0018

Abstract: A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a first signal portion (of the AC signal) and with another signal portion diverted by the inherent capacitances associated with the FET. For offsetting the loading caused by the inherent capacitances associated with the FET-based switch, a biasing circuit is configured and arranged to bias the back-gate terminal of the FET transistor with a follower signal.

Abstract translation: 数据链路电路通过通道之间的基于FET的电路切换高速信号。 FET响应于栅极端子处的控制信号，以信号传递模式或另一（阻塞）模式工作。 在通过模式中，通过耦合第一信号部分（AC信号）和与由FET相关联的固有电容转移的另一信号部分，在S-D端子之间通过AC（高速）信号。 为了抵消由与基于FET的开关相关联的固有电容引起的负载，偏置电路被配置和布置成用跟随器信号偏置FET晶体管的背栅极端子。