公开(公告)号：US09430604B2

公开(公告)日：2016-08-30

申请号：US14250168

申请日：2014-04-10

Applicant: NXP B.V.

Inventor： Jong Kim ,  James Spehar ,  Xu Zhang

IPC: G06F17/50 ,  H01L23/64 ,  H01L25/065

CPC classification number: G06F17/5072 ,  G06F17/5036 ,  G06F17/5077 ,  G06F2217/40 ,  H01L23/64 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various example embodiments are directed to methods and apparatuses for implementing a circuit design within an integrated circuit (IC) package. A respective capacitance is determined for each die contact of a circuit design. A respective target inductance range is selected for each of the plurality of die contacts based on the determined capacitance. A segmentation of the circuit design is determined as a function of the target inductance ranges. The segmentation defines an implementation of the circuit design on a plurality of IC dies. The IC dies are placed at respective locations on the substrate, based on the resulting inductances of connections (e.g., conductive traces) between the die contacts and terminals of the IC package.

Abstract translation: 各种示例性实施例涉及用于实现集成电路（IC）封装内的电路设计的方法和装置。 对于电路设计的每个管芯接触确定相应的电容。 基于所确定的电容，为多个管芯触点中的每一个选择相应的目标电感范围。 电路设计的分割被确定为目标电感范围的函数。 分割定义了多个IC管芯上的​​电路设计的实现。 基于所得到的管芯触点和IC封装端子之间的连接（例如，导电迹线）的电感，将IC管芯放置在基板上的相应位置处。

公开(公告)号：US10346339B2

公开(公告)日：2019-07-09

申请号：US14920674

申请日：2015-10-22

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: G06F13/40 ,  H04L12/803 ,  H04L25/02 ,  G06F13/42 ,  H03K5/1252 ,  H03K17/16

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

公开(公告)号：US09537462B2

公开(公告)日：2017-01-03

申请号：US14286057

申请日：2014-05-23

Applicant: NXP B.V.

Inventor： Madan Vemula ,  James Spehar

IPC: H03H7/40 ,  H01L23/66 ,  H03H11/30 ,  H01L23/00

CPC classification number: H03H7/40 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L2223/6655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30111 ,  H03H11/30 ,  H01L2924/014

Abstract: Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Abstract translation: 本公开的方面旨在解决阻抗匹配问题。 如可以结合一个或多个实施例来实现的，装置包括集成电路（IC）芯片，其具有信号连接端子和处理电路，所述信号连接端子和处理电路沿着IC芯片内的通信路径传递信号并连接到信号 - 连接端子 阻抗匹配电路用于为通信路径提供阻抗匹配，其中减轻由于阻抗失配引起的信号损失。 芯片安装结构固定IC芯片并在信号连接端子处与其电连接。

公开(公告)号：US09025288B2

公开(公告)日：2015-05-05

申请号：US13835554

申请日：2013-03-15

Applicant: NXP B.V.

Inventor： Madan Vemula ,  James Caravella ,  James Spehar ,  Gerrit Willem den Besten

IPC: H02H9/00 ,  H02H9/04

CPC classification number: H02H9/041 ,  H02H9/046 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0018

Abstract: Cross-talk is mitigated in a switching circuit. In accordance with one or more embodiments, an apparatus includes a multi-pin connector having signal-carrying electrodes that communicate with a device external to the apparatus, and respective field-effect switches that couple the signal-carrying electrodes to respective communication channels in the apparatus. The switches include a first field-effect semiconductor switch having a gate electrode adjacent a channel region that connects electrodes (e.g., source and drain regions) when a threshold switching voltage is applied to the gate, in which the electrodes are connected between one of the signal-carrying electrodes and a first channel coupled to an electrostatic discharge (ESD) circuit. A bias circuit mitigates cross-talk between the communication channels by biasing the channel region of the first field-effect semiconductor switch (in an off state) to boost the threshold switching voltage over a threshold discharge voltage of the ESD circuit.

Abstract translation: 串扰在开关电路中得到缓解。 根据一个或多个实施例，一种装置包括具有与设备外部的装置通信的信号承载电极的多针连接器以及将信号承载电极耦合到相应通信信道的相应的场效应开关 仪器。 开关包括第一场效应半导体开关，其具有栅极电极，邻近沟道区域，当阈值开关电压施加到栅极时，该栅极电极连接电极（例如，源极区域和漏极区域），其中电极连接在 信号承载电极和耦合到静电放电（ESD）电路的第一通道。 偏置电路通过偏置第一场效应半导体开关的通道区域（处于断开状态）来缓解通信通道之间的串扰，以提高阈值切换电压超过ESD电路的阈值放电电压。

公开(公告)号：US20140268445A1

公开(公告)日：2014-09-18

申请号：US13835554

申请日：2013-03-15

Applicant: NXP B.V.

Inventor： Madan Vemula ,  James Caravella ,  James Spehar ,  Gerrit Willem den Besten

IPC: H02H9/04

CPC classification number: H02H9/041 ,  H02H9/046 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0018

Abstract: Cross-talk is mitigated in a switching circuit. In accordance with one or more embodiments, an apparatus includes a multi-pin connector having signal-carrying electrodes that communicate with a device external to the apparatus, and respective field-effect switches that couple the signal-carrying electrodes to respective communication channels in the apparatus. The switches include a first field-effect semiconductor switch having a gate electrode adjacent a channel region that connects electrodes (e.g., source and drain regions) when a threshold switching voltage is applied to the gate, in which the electrodes are connected between one of the signal-carrying electrodes and a first channel coupled to an electrostatic discharge (ESD) circuit. A bias circuit mitigates cross-talk between the communication channels by biasing the channel region of the first field-effect semiconductor switch (in an off state) to boost the threshold switching voltage over a threshold discharge voltage of the ESD circuit.

Abstract translation: 串扰在开关电路中得到缓解。 根据一个或多个实施例，一种装置包括具有与设备外部的装置通信的信号承载电极的多针连接器以及将信号承载电极耦合到相应通信信道的相应的场效应开关 仪器。 开关包括第一场效应半导体开关，其具有栅极电极，邻近沟道区域，当阈值开关电压施加到栅极时，该栅极电极连接电极（例如，源极区域和漏极区域），其中电极连接在 信号承载电极和耦合到静电放电（ESD）电路的第一通道。 偏置电路通过偏置第一场效应半导体开关的通道区域（处于断开状态）来缓解通信通道之间的串扰，以提高阈值切换电压超过ESD电路的阈值放电电压。

公开(公告)号：US20160041940A1

公开(公告)日：2016-02-11

申请号：US14920674

申请日：2015-10-22

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: G06F13/40 ,  H03K5/1252 ,  H03K17/16 ,  G06F13/42

CPC classification number: G06F13/4068 ,  G06F13/4282 ,  H03K5/1252 ,  H03K17/161 ,  H04L25/0272 ,  H04L47/125

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Abstract translation: 可以将器件配置为在导电电路路径之间提供隔离，并且将导电电路路径之一选择性地连接到共享接口。 每个导电电路路径可以包括被设计为根据特定协议和对应的信号速度传输信号的驱动器电路。 在一种情况下，共享接口可以是设计用于连接到其他设备的连接器。 其他设备可以被配置为使用使用不同电路路径提供的一个或多个特定协议通过共享接口进行通信。

公开(公告)号：US20140247720A1

公开(公告)日：2014-09-04

申请号：US13783026

申请日：2013-03-01

Applicant: NXP B.V.

Inventor： James Spehar ,  Jingsong Zhou ,  Madan Vemula

IPC: H04L12/56

CPC classification number: G06F13/4068 ,  G06F13/4282 ,  H03K5/1252 ,  H03K17/161 ,  H04L25/0272 ,  H04L47/125

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Abstract translation: 可以将器件配置为在导电电路路径之间提供隔离，并且将导电电路路径之一选择性地连接到共享接口。 每个导电电路路径可以包括被设计为根据特定协议和对应的信号速度传输信号的驱动器电路。 在一种情况下，共享接口可以是设计用于连接到其他设备的连接器。 其他设备可以被配置为使用使用不同电路路径提供的一个或多个特定协议通过共享接口进行通信。

公开(公告)号：US20150341013A1

公开(公告)日：2015-11-26

申请号：US14286057

申请日：2014-05-23

Applicant: NXP B.V.

Inventor： Madan Vemula ,  James Spehar

IPC: H03H7/40

CPC classification number: H03H7/40 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L2223/6655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30111 ,  H03H11/30 ,  H01L2924/014

Abstract: Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Abstract translation: 本公开的方面旨在解决阻抗匹配问题。 如可以结合一个或多个实施例来实现的，装置包括集成电路（IC）芯片，其具有信号连接端子和处理电路，所述信号连接端子和处理电路沿着IC芯片内的通信路径传递信号并连接到信号 - 连接端子 阻抗匹配电路用于为通信路径提供阻抗匹配，其中减轻由于阻抗失配引起的信号损失。 芯片安装结构固定IC芯片并在信号连接端子处与其电连接。

公开(公告)号：US20150169817A1

公开(公告)日：2015-06-18

申请号：US14250168

申请日：2014-04-10

Applicant: NXP B.V.

Inventor： Jong Kim ,  James Spehar ,  Xu Zhang

IPC: G06F17/50 ,  H01L23/495

CPC classification number: G06F17/5072 ,  G06F17/5036 ,  G06F17/5077 ,  G06F2217/40 ,  H01L23/64 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various example embodiments are directed to methods and apparatuses for implementing a circuit design within an integrated circuit (IC) package. A respective capacitance is determined for each die contact of a circuit design. A respective target inductance range is selected for each of the plurality of die contacts based on the determined capacitance. A segmentation of the circuit design is determined as a function of the target inductance ranges. The segmentation defines an implementation of the circuit design on a plurality of IC dies. The IC dies are placed at respective locations on the substrate, based on the resulting inductances of connections (e.g., conductive traces) between the die contacts and terminals of the IC package.

Abstract translation: 各种示例性实施例涉及用于实现集成电路（IC）封装内的电路设计的方法和装置。 对于电路设计的每个管芯接触确定相应的电容。 基于所确定的电容，为多个管芯触点中的每一个选择相应的目标电感范围。 电路设计的分割被确定为目标电感范围的函数。 分割定义了多个IC管芯上的​​电路设计的实现。 基于所得到的管芯触点和IC封装端子之间的连接（例如，导电迹线）的电感，将IC管芯放置在基板上的相应位置处。