公开(公告)号：US20240356543A1

公开(公告)日：2024-10-24

申请号：US18332522

申请日：2023-06-09

Applicant: NXP B.V.

Inventor： Henricus Cornelis Johannes Büthker ,  Jyotirmoy Ghosh ,  Piotr Gibas ,  Edwin Schapendonk ,  Neha Goel ,  Namith Vishnu N

IPC: H03K17/22 ,  H03K3/037

CPC classification number: H03K17/223 ,  H03K3/037

Abstract: One example discloses a power on reset (POR) circuit, wherein a first circuit is configured to un-couple a power supply input from a resistor divider when the voltage on a second end of the capacitor is above a first circuit threshold; a second circuit configured to couple the second end of the capacitor to the power supply input when a voltage on at least one tap point of the resistor divider is above a second circuit threshold; wherein the comparator is coupled to at least one of the tap points, the reference potential, and a POR output; and wherein the comparator is configured to ramp-up a POR signal on the POR output when a voltage on the at least one of the tap points is greater than the comparator threshold.

公开(公告)号：US20240203480A1

公开(公告)日：2024-06-20

申请号：US18535443

申请日：2023-12-11

Applicant: NXP B.V.

Inventor： Prokash Ghosh ,  Jyotirmoy Ghosh ,  Glenn Charles Abeln ,  Dwarka Prasad ,  Rajat Kohli ,  Jainendra Singh ,  Jwalant Kumar Mishra

IPC: G11C11/4078 ,  G11C11/4074 ,  G11C11/4076

CPC classification number: G11C11/4078 ,  G11C11/4074 ,  G11C11/4076

Abstract: A memory power control unit, MPCU, is provided for preventing unauthorised access to data stored in a volatile memory, the MPCU comprising a power controller comprising an input configured to receive a signal from a tamper detection circuit, a first supply input configured 5 to receive a first supply voltage, a first reference input configured to receive a first reference voltage, a supply output configured to output a supply voltage to the volatile memory, a reference output configured to output a reference voltage to the volatile memory, wherein, in response to receipt of a signal at the input indicative of an attempt to tamper with the volatile memory, the power controller is configured to output a reduced supply voltage via the supply 10 output for a first predetermined time period, wherein the reduced supply voltage is less than the first supply voltage.

公开(公告)号：US20230059128A1

公开(公告)日：2023-02-23

申请号：US17445493

申请日：2021-08-19

Applicant: NXP B.V.

Inventor： Henricus Cornelis Johannes Büthker ,  Jyotirmoy Ghosh

IPC: H02M3/158 ,  H02J7/00

Abstract: One example discloses a voltage converter, comprising: an input configured to receive a first voltage from a battery; an output configured to provide a second voltage to a load; a controller configured to reduce a battery current received from the battery if the first voltage received from the battery is below a first threshold voltage.