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公开(公告)号：US20240121148A1
公开(公告)日：2024-04-11
申请号：US18469164
申请日：2023-09-18
Applicant: NXP B.V.
Inventor： Olivier Jérôme Célestin Jamin , Ludovic Oddoart , Gilles Seferian
CPC classification number: H04L27/364 , H04B1/0475
Abstract: In accordance with a first aspect of the present disclosure, a radio frequency (RF) communication device is provided, comprising: a receiver unit configured to receive at least one radio frequency signal, wherein the receiver unit has a variable initial phase; a controller configured to change said initial phase; a measurement unit configured to measure a plurality of amplitudes and/or phases of the radio frequency signal, wherein each of said amplitudes and/or phases of the radio frequency signal corresponds to a different initial phase of the receiver unit. In accordance with a second aspect of the present disclosure, a corresponding method of operating an RF communication device is conceived.
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公开(公告)号：US20230195151A1
公开(公告)日：2023-06-22
申请号：US18048163
申请日：2022-10-20
Applicant: NXP B.V.
Abstract: It is described a voltage regulator device (100), comprising:
i) a power device (150), configured to receive an input signal (151) and to produce a corresponding output signal (152);
ii) a comparator device (110), coupled via a feedback path (140) to the power device (150), and configured to receive the output signal (152) as a feedback signal (141), and to produce a compared feedback signal (112); and
iii) a digital modulation device (120), arranged between the comparator device (110) and the power device (150), and configured to digitally modulate the compared feedback signal (112), and to provide the digitally modulated signal (121) to the power device (150), wherein the digital modulation device (120) comprises:
iiia) a delta-sigma (122),
iiib) a quantizer (124), and
iiic) a feedforward path (128), configured to feedforward the compared feedback signal (112) beyond the delta-sigma (122).-
公开(公告)号：US20220271642A1
公开(公告)日：2022-08-25
申请号：US17651689
申请日：2022-02-18
Applicant: NXP B.V.
Abstract: There is described a method of controlling a single inductor multiple output, SIMO, switching converter, the method comprising (a) counting, for each output of the multiple outputs of the SIMO switching converter, a period of time during which an output voltage at the respective output is below a corresponding individual threshold value, (b) identifying that output among the multiple outputs of the SIMO switching converter for which the counted period of time is longest, and (c) connecting the identified output to the single inductor of the SIMO switching converter to supply current from the single inductor of the SIMO switching converter to the identified output. Furthermore, a corresponding controller is described.
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公开(公告)号：US10819378B2
公开(公告)日：2020-10-27
申请号：US16553543
申请日：2019-08-28
Applicant: NXP B.V.
Inventor： Olivier Jerome Celestin Jamin , Ludovic Oddoart
Abstract: A transmitter circuit includes first and second carrier signal generators for generating corresponding first and second digital carrier signals, each having the same frequency. Modulation circuitry determines a phase shift value based on a received modulation signal. Outphasing circuitry generates a first digital output signal by adding the phase shift value to the phase of the first digital carrier signal and generates a second digital output signal by subtracting the phase shift value from the phase of the second digital carrier signal. A first switched-capacitor digital-to-analog converter (DAC) receives the first digital output signal and generates a first analog antenna output signal. A second switched-capacitor DAC receives the second digital output signal and generates a second analog antenna output signal. The sampling phases of the first and second DACs are opposite one another, whereby the first and second analog antenna output signals form a time-interleaved antenna output signal.
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公开(公告)号：US20240176975A1
公开(公告)日：2024-05-30
申请号：US18493883
申请日：2023-10-25
Applicant: NXP B.V.
Inventor： Olivier Jérôme Célestin Jamin , Ludovic Oddoart , Amandine Lesellier , Fabien Boitard
CPC classification number: G06K19/045 , H02M1/0045 , H02M3/158 , H03L7/0814 , H03L7/0816
Abstract: There is described a radio device comprising:
i) a receiver;
ii) a DC/DC converter;
iii) a clock device, configured to provide a synchronous clock to the receiver and the DC/DC converter; and
iv) a control device, configured to determine an information indicative of the DC/DC converter duty cycle, and to adjust the initial phase of the DC/DC converter clock and/or the receiver clock based on said information.-
Patent Agency Ranking
公开(公告)号：US11099619B2
公开(公告)日：2021-08-24
申请号：US16517227
申请日：2019-07-19
Applicant: NXP B.V.
Inventor： Fabien Boitard , Ludovic Oddoart
Abstract: A chip includes a first pin coupled to a signal line and a controller to detect a state of the signal line using the first pin. The controller controls output of first power to the signal line through the first pin based on a first state of the signal line and prevents output of the first power to the signal line through the first pin based on a second state of the signal line. The signal line may be coupled to provide second power from a power source to a data storage device.
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7.发明授权公开(公告)号：US11294412B2
公开(公告)日：2022-04-05
申请号：US17091401
申请日：2020-11-06
Applicant: NXP B.V.
Inventor： Christian Vincent Sorace , Ludovic Oddoart , Fabien Boitard
Abstract: An example apparatus includes power amplification circuitry and current-level switch circuitry. The power amplification circuitry has a first input port, a second input port, and field-effect transistor (FET) circuitry, the FET circuitry to operate in a saturation mode while drawing power provided at the first input port from a first power source. The current-level switch circuitry is to sense a change in a current-level used to maintain the FET circuitry in the saturation mode and, in response to the sensed change in the current-level, to cause the power amplification circuitry to draw power provided at the second input port from a second power source while maintaining the saturation mode of the FET circuitry.
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8.发明申请公开(公告)号：US20210173422A1
公开(公告)日：2021-06-10
申请号：US17091401
申请日：2020-11-06
Applicant: NXP B.V.
Inventor： Christian Vincent SORACE , Ludovic Oddoart , Fabien Boitard
Abstract: An example apparatus includes power amplification circuitry and current-level switch circuitry. The power amplification circuitry has a first input port, a second input port, and field-effect transistor (FET) circuitry, the FET circuitry to operate in a saturation mode while drawing power provided at the first input port from a first power source. The current-level switch circuitry is to sense a change in a current-level used to maintain the FET circuitry in the saturation mode and, in response to the sensed change in the current-level, to cause the power amplification circuitry to draw power provided at the second input port from a second power source while maintaining the saturation mode of the FET circuitry.
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公开(公告)号：US20200106465A1
公开(公告)日：2020-04-02
申请号：US16553543
申请日：2019-08-28
Applicant: NXP B.V.
Inventor： Olivier Jerome Celestin Jamin , Ludovic Oddoart
IPC: H04B1/04
Abstract: A transmitter circuit includes first and second carrier signal generators for generating corresponding first and second digital carrier signals, each having the same frequency Modulation circuitry determines a phase shift value based on a received modulation signal. Outphasing circuitry generates a first digital output signal by adding the phase shift value to the phase of the first digital carrier signal and generates a second digital output signal by subtracting the phase shift value from the phase of the second digital carrier signal. A first switched-capacitor digital-to-analog converter (DAC) receives the first digital output signal and generates a first analog antenna output signal. A second switched-capacitor DAC receives the second digital output signal and generates a second analog antenna output signal. The sampling phases of the first and second DACs are opposite one another, whereby the first and second analog antenna output signals form a time-interleaved antenna output signal.
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公开(公告)号：US12126248B2
公开(公告)日：2024-10-22
申请号：US17651689
申请日：2022-02-18
Applicant: NXP B.V.
Abstract: There is described a method of controlling a single inductor multiple output, SIMO, switching converter, the method comprising (a) counting, for each output of the multiple outputs of the SIMO switching converter, a period of time during which an output voltage at the respective output is below a corresponding individual threshold value, (b) identifying that output among the multiple outputs of the SIMO switching converter for which the counted period of time is longest, and (c) connecting the identified output to the single inductor of the SIMO switching converter to supply current from the single inductor of the SIMO switching converter to the identified output. Furthermore, a corresponding controller is described.
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