公开(公告)号：US12301249B2

公开(公告)日：2025-05-13

申请号：US18310184

申请日：2023-05-01

Applicant: NXP B.V.

Inventor： Muhammed Bolatkale ,  Lucien Johannes Breems ,  Pierluigi Cenci ,  Shagun Bajoria ,  Mohammed Abo Alainein

IPC: H03M1/14 ,  H03M1/06 ,  H03M1/12 ,  H03M1/16 ,  H03M1/66 ,  H03M1/74

Abstract: There is described an analog-to-digital converter, ADC, device (100), comprising: i) a first converter stage (110), comprising a first digital-to-analog converter, DAC, (115), comprising at least two first unit elements (116, 117, 118) each with a first unit element value (U11, U12, U13); ii) a second converter stage (120), comprising a second DAC (125), comprising at least two second unit elements each with a second unit element value (U21, U22, U23); and iii) a control device (180), coupled to the first DAC (115) and the second DAC and configured to: swap at least one of the first unit element values (U1) with at least one of the second unit element values (U2) to obtain corresponding third unit element values (U3) and forth unit element values (U4).

公开(公告)号：US20240048146A1

公开(公告)日：2024-02-08

申请号：US18357689

申请日：2023-07-24

Applicant: NXP B.V.

Inventor： Shagun Bajoria ,  Muhammed Bolatkale ,  Lucien Johannes Breems ,  Robert Rutten ,  Mohammed Abo Alainein

IPC: H03M1/06

CPC classification number: H03M1/0602

Abstract: A circuit 100 is described comprising (i) a first digital-to-analog converter 110, (ii) a second digital-to-analog converter 111, (iii) a plurality of unit elements 120, and (iv) switching circuitry 130. The switching circuitry 130 is adapted so that in a first switching state 231, a set of unit elements 221 of the plurality of unit elements 120 forms part of the first digital-to-analog converter 110, and in a second switching state 232, the set of unit elements 221 forms part of the second digital-to-analog converter 111. Furthermore, a corresponding method of operating a circuit 100 is described.

公开(公告)号：US20230361781A1

公开(公告)日：2023-11-09

申请号：US18310184

申请日：2023-05-01

Applicant: NXP B.V.

Inventor： Muhammed Bolatkale ,  Lucien Johannes Breems ,  Pierluigi Cenci ,  Shagun Bajoria ,  Mohammed Abo Alainein

IPC: H03M1/14 ,  H03M1/66

CPC classification number: H03M1/14 ,  H03M1/662

Abstract: There is described an analog-to-digital converter, ADC, device (100), comprising:



i) a first converter stage (110), comprising a first digital-to-analog converter, DAC, (115), comprising at least two first unit elements (116, 117, 118) each with a first unit element value (U11, U12, U13);
ii) a second converter stage (120), comprising a second DAC (125), comprising at least two second unit elements each with a second unit element value (U21, U22, U23); and
iii) a control device (180), coupled to the first DAC (115) and the second DAC and configured to:
swap at least one of the first unit element values (U1) with at least one of the second unit element values (U2) to obtain corresponding third unit element values (U3) and forth unit element values (U4).