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公开(公告)号：US20150172080A1
公开(公告)日：2015-06-18
申请号：US14133267
申请日：2013-12-18
Applicant: NXP B.V.
Inventor： Remco Cornelis Herman van de Beek , Massimo Ciacci , Ghiath Al-kadi
CPC classification number: H04L25/06 , G06K19/0715 , G06K19/07771 , H03F1/30 , H03F2200/375 , H04L27/06
Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.
Abstract translation: 近程集成电路卡偏置调整。 在一个示例中，具有用于将具有信息部分和偏置部分的数据帧信号转换成输出代码的解码范围的解码电路; 以及偏置调整电路，其耦合以从解码电路接收输出代码，并且调整数据帧信号的偏置部分，使得输出代码处于解码范围内。 在另一示例中，一种用于近程集成电路卡偏移调整的方法，包括：将具有信息部分和偏置部分的数据帧信号转换为输出代码; 并且公开了数据帧信号的偏置部分，使得输出码在解码范围内。
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公开(公告)号：US20150063517A1
公开(公告)日：2015-03-05
申请号：US14015197
申请日：2013-08-30
Applicant: NXP B.V.
Inventor： Jos Verlinden , Remco Cornelis Herman van de Beek
CPC classification number: H04L7/0331 , H03L7/0992 , H03L7/14 , H03L7/23 , H03L7/235 , H04L7/0079
Abstract: Various aspects of the present disclosure are directed apparatuses and methods including a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates a PLL-PLL control signal. The second PLL circuit receives a stable reference-oscillation signal, and, in response to the PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the second PLL circuit. The first PLL circuit and the second PLL circuit are configured to produce an output frequency signal that is synchronous to the carrier signal.
Abstract translation: 本公开的各个方面涉及包括第一锁相环（PLL）电路和第二PLL电路的装置和方法。 第一PLL电路从非同步装置接收通过通信信道发送的载波信号，并生成PLL-PLL控制信号。 第二PLL电路接收稳定的参考振荡信号，响应于指示频率偏移的PLL-PLL控制信号，调整第二PLL电路的分数除数比。 第一PLL电路和第二PLL电路被配置为产生与载波信号同步的输出频率信号。
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公开(公告)号：US20150254543A1
公开(公告)日：2015-09-10
申请号：US14719781
申请日：2015-05-22
Applicant: NXP B.V.
Inventor： Ghiath Al-Kadi , Massimo Ciacci , Remco Cornelis Herman van de Beek
CPC classification number: G06K19/0723 , G06K19/07 , H04L1/0053 , H04L1/0075 , H04L1/20 , H04W4/80 , Y02D70/166
Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.
Abstract translation: 本发明提出了一种智能卡，其包括数字信号处理接收器，其可以基于从读取器接收的信号的误差向量大小自动识别智能卡读卡器的类型。 数字信号处理接收器能够在运行时重新配置自身，以便根据其正在通信的读取器的类型来最佳化其功耗。 此外，本发明提出了一种新的前导码结构，其包括基本部分和可选的附加部分。
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公开(公告)号：US08842720B2
公开(公告)日：2014-09-23
申请号：US13929670
申请日：2013-06-27
Applicant: NXP B.V.
Inventor： Remco Cornelis Herman van de Beek , Massimo Ciacci , Jos Verlinden , Ghaith Al-kadi
CPC classification number: H04L25/03891 , H03F1/3241 , H03F3/195 , H03F3/24 , H04L25/03343 , H04L25/49 , H04L27/368
Abstract: The method comprises receiving an input stream of symbols (x(i)) representing a phase change and magnitude of an RF signal, the magnitudes of the symbols are constant, the phase changes of the symbols encode digital information, and adjust the input stream of symbols to reduce inter-symbol interference. The adjusting iteratively determines a next symbol of the equalized stream (x′(n)) after receiving a next symbol of the input stream (x(n)) by multiplying the next symbol of the input stream (x(n)) with a next adjusting real number (a(n)), multiplying a previous symbol of the input stream (x(n−1)) with a previous adjusting real number (a(n−1)), the previous symbol being received before the next symbol of the input stream, and the next symbol of the equalized stream is computed from the multiplied next symbol and the multiplied previous symbol of the input stream.
Abstract translation: 该方法包括接收表示RF信号的相位变化和幅度的符号（x（i））的输入流，符号的大小是恒定的，符号的相位变化对数字信息进行编码，并且调整输入流 符号以减少符号间干扰。 在通过将输入流（x（n））的下一个符号乘以输入流（x（n））的下一个符号之后，通过将输入流（x（n））的下一个符号与 下一个调整实数（a（n）），将输入流的先前符号（x（n-1））与先前的调整实数（a（n-1））相乘），先前的符号在下一个 输入流的符号，并且均衡流的下一个符号从乘法的下一个符号和输入流的相乘的先前符号计算。
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公开(公告)号：US20140192934A1
公开(公告)日：2014-07-10
申请号：US13735780
申请日：2013-01-07
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Remco Cornelis Herman van de Beek , Ghiath Al-Kadi
IPC: H04B1/16
CPC classification number: H04B1/16 , H04B1/0003 , H04B5/0081 , H04L25/0266 , H04L25/03 , H04L25/06
Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.
Abstract translation: 描述了用于处理直流（DC）抑制系统中的基带信号的方法，用于处理DC抑制系统中的基带信号的处理系统和智能卡的实施例。 在一个实施例中，用于处理DC抑制系统中的基带信号的方法包括用第一高通滤波器（HPF）处理模拟域中的基带信号，将处理的基带信号转换为数字信号，并处理数字信号 信号在数字域中具有第二HPF，以提供基带信号的离散时间差分。 还描述了其它实施例。
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Patent Agency Ranking
公开(公告)号：US09768985B2
公开(公告)日：2017-09-19
申请号：US15006794
申请日：2016-01-26
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Ghiath Al-kadi , Remco Cornelis Herman van de Beek , Jos Verlinden
CPC classification number: H04L25/03019 , H04L25/03343 , H04L27/34 , H04L27/368 , H04L2025/03726 , H04L2025/03802
Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.
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公开(公告)号：US09426003B2
公开(公告)日：2016-08-23
申请号：US14133267
申请日：2013-12-18
Applicant: NXP B.V.
Inventor： Remco Cornelis Herman van de Beek , Massimo Ciacci , Ghiath Al-kadi
CPC classification number: H04L25/06 , G06K19/0715 , G06K19/07771 , H03F1/30 , H03F2200/375 , H04L27/06
Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.
Abstract translation: 近程集成电路卡偏置调整。 在一个示例中，具有用于将具有信息部分和偏置部分的数据帧信号转换为输出代码的解码范围的解码电路; 以及偏置调整电路，其耦合以从解码电路接收输出代码，并且调整数据帧信号的偏置部分，使得输出代码处于解码范围内。 在另一示例中，一种用于近程集成电路卡偏移调整的方法，包括：将具有信息部分和偏置部分的数据帧信号转换为输出代码; 并且公开了数据帧信号的偏置部分，使得输出码在解码范围内。
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8.发明授权公开(公告)号：US08964904B2
公开(公告)日：2015-02-24
申请号：US13735780
申请日：2013-01-07
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Remco Cornelis Herman van de Beek , Ghiath Al-Kadi
CPC classification number: H04B1/16 , H04B1/0003 , H04B5/0081 , H04L25/0266 , H04L25/03 , H04L25/06
Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.
Abstract translation: 描述了用于处理直流（DC）抑制系统中的基带信号的方法，用于处理DC抑制系统中的基带信号的处理系统和智能卡的实施例。 在一个实施例中，用于处理DC抑制系统中的基带信号的方法包括用第一高通滤波器（HPF）处理模拟域中的基带信号，将处理的基带信号转换为数字信号，并处理数字信号 信号在数字域中具有第二HPF，以提供基带信号的离散时间差分。 还描述了其它实施例。
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公开(公告)号：US20170214553A1
公开(公告)日：2017-07-27
申请号：US15006794
申请日：2016-01-26
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Ghiath Al-kadi , Remco Cornelis Herman van de Beek , Jos Verlinden
CPC classification number: H04L25/03019 , H04L25/03343 , H04L27/34 , H04L27/368 , H04L2025/03726 , H04L2025/03802
Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.
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公开(公告)号：US09367787B2
公开(公告)日：2016-06-14
申请号：US14719781
申请日：2015-05-22
Applicant: NXP B.V.
Inventor： Ghiath Al-Kadi , Massimo Ciacci , Remco Cornelis Herman van de Beek
CPC classification number: G06K19/0723 , G06K19/07 , H04L1/0053 , H04L1/0075 , H04L1/20 , H04W4/80 , Y02D70/166
Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.
Abstract translation: 本发明提出了一种智能卡，其包括数字信号处理接收器，其可以基于从读取器接收的信号的误差向量大小自动识别智能卡读卡器的类型。 数字信号处理接收器能够在运行时重新配置自身，以便根据其正在通信的读取器的类型来最佳化其功耗。 此外，本发明提出了一种新的前导码结构，其包括基本部分和可选的附加部分。
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