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1.
公开(公告)号:US11031776B2
公开(公告)日:2021-06-08
申请号:US16184808
申请日:2018-11-08
Applicant: NXP B.V.
Inventor: Siamak Delshadpour , Xiaoqun Liu
IPC: H02H9/04
Abstract: Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.
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公开(公告)号:US09678111B2
公开(公告)日:2017-06-13
申请号:US14877696
申请日:2015-10-07
Applicant: NXP B.V.
Inventor: Xiaoqun Liu , Siamak Delshadpour
CPC classification number: G01R15/146 , G01R19/0092 , G01R19/16571 , G01R19/32 , H03K3/011
Abstract: A system can provide current detection in an integrated circuit (IC) chip while compensating for variations in circuit components resulting from process, voltage supply, temperature, or combinations thereof. The system can include the IC chip that has a power switch circuit that includes a power circuit path including a first transistor connected to a power source through a first conductive trace that has a first resistance value, and to a load by a second conductive trace having a second resistance value. A current detection circuit is configured to compensate for the variations in the power switch circuit using a sense circuit path that is configured to match process, voltage supply, and temperature variations in the power circuit path.
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公开(公告)号:US20200313428A1
公开(公告)日:2020-10-01
申请号:US16363991
申请日:2019-03-25
Applicant: NXP B.V.
Inventor: Siamak Delshadpour , Xiaoqun Liu
IPC: H02H9/04 , G01R31/28 , H03K17/0812
Abstract: An over-voltage tolerant test bus for an integrated circuit (IC) is disclosed. The over-voltage tolerant test bus includes a first switch to be coupled to a test pin of the IC and a second switch to be coupled to an internal module of the IC. The second switch is coupled to the first switch in series. The over-voltage tolerant test bus also includes a protection circuit coupled between the first switch and the second switch and a supply voltage to keep a voltage between a source and a drain of the first switch substantially equal to a difference between a voltage at the test pin and the supply voltage.
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公开(公告)号:US20170102413A1
公开(公告)日:2017-04-13
申请号:US14877696
申请日:2015-10-07
Applicant: NXP B.V.
Inventor: Xiaoqun Liu , Siamak Delshadpour
CPC classification number: G01R15/146 , G01R19/0092 , G01R19/16571 , G01R19/32 , H03K3/011
Abstract: A system can provide current detection in an integrated circuit (IC) chip while compensating for variations in circuit components resulting from process, voltage supply, temperature, or combinations thereof. The system can include the IC chip that has a power switch circuit that includes a power circuit path including a first transistor connected to a power source through a first conductive trace that has a first resistance value, and to a load by a second conductive trace having a second resistance value. A current detection circuit is configured to compensate for the variations in the power switch circuit using a sense circuit path that is configured to match process, voltage supply, and temperature variations in the power circuit path.
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公开(公告)号:US11422578B2
公开(公告)日:2022-08-23
申请号:US16860887
申请日:2020-04-28
Applicant: NXP B.V.
Inventor: Xiaoqun Liu , Madan Mohan Reddy Vemula , Mohammad Nizam Kabir
Abstract: A low dropout regulator includes a first stage that generate a first output voltage and a second stage that generates a second output voltage different from the first output voltage. The first stage and the second stage are coupled in parallel to a node, the stages are selectively controlled respective first and second output signals based on different conditions. One condition may be operation of a load in one or more predetermined modes. Another condition may be transition between modes. Selective control of the first stage during a mode transition may reduce voltage undershoot or voltage overshoot in the load.
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公开(公告)号:US10998897B2
公开(公告)日:2021-05-04
申请号:US16171012
申请日:2018-10-25
Applicant: NXP B.V.
Inventor: Xiaoqun Liu , Madan Mohan Reddy Vemula
IPC: H03K17/082 , H03K17/693 , H03K17/687 , H03K17/567 , H03K17/081 , H02H9/02
Abstract: A power switch over current protection system including a power switch transistor configured to deliver a power current from a power source to power load, a power switch driver configured to control and on/off state of the power switch, an over current protection (OCP) circuit to detect a threshold value of the power current, a discharge transistor configured to discharge a parasitic capacitance of the power switch transistor, and a system state machine to receive a signal from the OCP circuit configured to control an action of the power switch driver and discharge transistor depending on the level of the power current.
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公开(公告)号:US10826386B2
公开(公告)日:2020-11-03
申请号:US16172464
申请日:2018-10-26
Applicant: NXP B.V.
Inventor: Xiaoqun Liu , Madan Mohan Reddy Vemula
Abstract: A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.
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8.
公开(公告)号:US20200153240A1
公开(公告)日:2020-05-14
申请号:US16184808
申请日:2018-11-08
Applicant: NXP B.V.
Inventor: Siamak Delshadpour , Xiaoqun Liu
IPC: H02H9/04
Abstract: Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.
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公开(公告)号:US11533053B2
公开(公告)日:2022-12-20
申请号:US17032784
申请日:2020-09-25
Applicant: NXP B.V.
Inventor: Siamak Delshadpour , Xiaoqun Liu , Steven Daniel
IPC: H03K19/0185 , H03K19/09 , H03K5/24 , H03K5/15 , H03K7/06
Abstract: Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, including: a frequency filter configured to receive the input signal, wherein the frequency filter includes adjustable components configured to adjust the frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier includes an adjustable current source configured to adjust the current consumption of the rectifier; a reference signal generator configured to produce a reference signal; a current to voltage converter configured to convert the current of the rectified signal to a rectified voltage and to convert the current of the reference signal to a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to produce a demodulated output signal.
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公开(公告)号:US11038345B2
公开(公告)日:2021-06-15
申请号:US16363991
申请日:2019-03-25
Applicant: NXP B.V.
Inventor: Siamak Delshadpour , Xiaoqun Liu
IPC: G01R31/28 , H02H9/04 , H03K17/0812
Abstract: An over-voltage tolerant test bus for an integrated circuit (IC) is disclosed. The over-voltage tolerant test bus includes a first switch to be coupled to a test pin of the IC and a second switch to be coupled to an internal module of the IC. The second switch is coupled to the first switch in series. The over-voltage tolerant test bus also includes a protection circuit coupled between the first switch and the second switch and a supply voltage to keep a voltage between a source and a drain of the first switch substantially equal to a difference between a voltage at the test pin and the supply voltage.
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