公开(公告)号：US11145609B2

公开(公告)日：2021-10-12

申请号：US16704283

申请日：2019-12-05

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Yu-Ting David Wu ,  Nick Yang

IPC: H01L23/66 ,  H01L23/495 ,  H03F1/02 ,  H03F3/21 ,  H03F3/24 ,  H05K1/02

Abstract: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.

公开(公告)号：US11128269B2

公开(公告)日：2021-09-21

申请号：US16718679

申请日：2019-12-18

Applicant: NXP USA, Inc.

Inventor： Elie A. Maalouf ,  Yu-Ting David Wu ,  Lu Wang ,  Nick Yang

IPC: H03F3/191 ,  H03F3/213 ,  H01L23/66 ,  H03F1/02 ,  H03F1/56 ,  H03F3/195 ,  H04B1/04

Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.

公开(公告)号：US20180175802A1

公开(公告)日：2018-06-21

申请号：US15846162

申请日：2017-12-18

Applicant: NXP USA, Inc.

Inventor： Yu-Ting David Wu ,  Enver Krvavac ,  Joseph Gerard Schultz ,  Nick Yang ,  Damon G. Holmes ,  Shishir Ramasare Shukla ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Mario Bokatius

IPC: H03F1/02 ,  H01L27/06 ,  H01L23/66 ,  H03F3/195 ,  H03F1/56 ,  H03F3/213

CPC classification number: H03F1/0288 ,  H01L23/66 ,  H01L27/0629 ,  H01L27/085 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2223/6677 ,  H03F1/56 ,  H03F1/565 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/451

Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

公开(公告)号：US12088255B2

公开(公告)日：2024-09-10

申请号：US17344789

申请日：2021-06-10

Applicant: NXP USA, Inc.

Inventor： Nick Yang ,  Yu-Ting David Wu ,  Joseph Gerard Schultz

IPC: H03F3/45 ,  H03F1/02 ,  H03F3/21

CPC classification number: H03F1/0288 ,  H03F3/211

Abstract: A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.

公开(公告)号：US20220399856A1

公开(公告)日：2022-12-15

申请号：US17344789

申请日：2021-06-10

Applicant: NXP USA, Inc.

Inventor： Nick Yang ,  Yu-Ting David Wu ,  Joseph Gerard Schultz

IPC: H03F1/02 ,  H03F3/21

Abstract: A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.

公开(公告)号：US20190173430A1

公开(公告)日：2019-06-06

申请号：US15830477

申请日：2017-12-04

Applicant: NXP USA, Inc.

Inventor： James Krehbiel ,  Nick Yang ,  Joseph Gerard Schultz ,  Enver Krvavac ,  Yu-Ting David Wu

IPC: H03F1/02 ,  H03F3/195 ,  H03F3/60

Abstract: Embodiments of a multiple-path amplifier (e.g., a Doherty amplifier) and a module housing the amplifier include a first amplifier (or first power transistor die) with a first output terminal, a second amplifier (or second power transistor die) with a second output terminal, and an impedance inverter line assembly electrically connected between the first and second output terminals. The impedance inverter line assembly includes a first transmission line and a surface mount component connected in series between the first and second output terminals. In various embodiments, the surface mount component is selected from a fixed-value capacitor, a fixed-value inductor, a tunable capacitor, a tunable inductor, and a tunable passive component network.

公开(公告)号：US20220182022A1

公开(公告)日：2022-06-09

申请号：US17110568

申请日：2020-12-03

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Yu-Ting David Wu ,  Nick Yang

IPC: H03F3/195 ,  H03F3/24 ,  H03F1/56 ,  H03F1/02 ,  H01L23/60 ,  H01L23/66 ,  H01L23/00

Abstract: An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

公开(公告)号：US10249582B2

公开(公告)日：2019-04-02

申请号：US15383775

申请日：2016-12-19

Applicant: NXP USA, INC.

Inventor： Nick Yang

IPC: H03B5/08 ,  H03F1/02 ,  H03F3/19 ,  H03F3/21 ,  H03F3/24 ,  H01L23/66 ,  H01L23/498

Abstract: The embodiments described herein use resonant circuits to provide isolation between closely proximate conductors. For example, these resonant circuits can be used to reduce unwanted electromagnetic coupling and minimize crosstalk energy between package leads, bonding wires, and circuit board traces on radio frequency (RF) electronic devices, including RF power amplifiers. To facilitate a reduction in electromagnetic coupling, the resonant circuit is configured resonate with the closely proximate conductors at a selected frequency f0, and when resonating at the selected frequency f0 the resonant circuit provides a path to ground for the crosstalk energy. This path to ground reduces the crosstalk energy that would otherwise be shared between the two closely proximate conductors, and thus provides the electromagnetic isolation between the conductors.

公开(公告)号：US11695375B2

公开(公告)日：2023-07-04

申请号：US17110568

申请日：2020-12-03

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Yu-Ting David Wu ,  Nick Yang

IPC: H03F3/21 ,  H03F3/195 ,  H01L23/60 ,  H01L23/66 ,  H01L23/00 ,  H03F1/02 ,  H03F1/56 ,  H03F3/24

CPC classification number: H03F3/195 ,  H01L23/60 ,  H01L23/66 ,  H01L24/49 ,  H03F1/0288 ,  H03F1/565 ,  H03F3/245 ,  H01L2223/6655 ,  H03F2200/318 ,  H03F2200/451

Abstract: An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

公开(公告)号：US20210194443A1

公开(公告)日：2021-06-24

申请号：US16718679

申请日：2019-12-18

Applicant: NXP USA, Inc.

Inventor： Elie A. Maalouf ,  Yu-Ting David Wu ,  Lu Wang ,  Nick Yang

IPC: H03F3/213 ,  H03F1/56 ,  H03F1/02 ,  H03F3/195 ,  H01L23/66 ,  H04B1/04

Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.