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公开(公告)号:US11145609B2
公开(公告)日:2021-10-12
申请号:US16704283
申请日:2019-12-05
申请人: NXP USA, Inc.
摘要: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.
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公开(公告)号:US11128269B2
公开(公告)日:2021-09-21
申请号:US16718679
申请日:2019-12-18
申请人: NXP USA, Inc.
发明人: Elie A. Maalouf , Yu-Ting David Wu , Lu Wang , Nick Yang
摘要: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.
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3.
公开(公告)号:US20180175802A1
公开(公告)日:2018-06-21
申请号:US15846162
申请日:2017-12-18
申请人: NXP USA, Inc.
发明人: Yu-Ting David Wu , Enver Krvavac , Joseph Gerard Schultz , Nick Yang , Damon G. Holmes , Shishir Ramasare Shukla , Jeffrey Kevin Jones , Elie A. Maalouf , Mario Bokatius
CPC分类号: H03F1/0288 , H01L23/66 , H01L27/0629 , H01L27/085 , H01L2223/6611 , H01L2223/6616 , H01L2223/6655 , H01L2223/6677 , H03F1/56 , H03F1/565 , H03F3/195 , H03F3/213 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03F2200/451
摘要: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
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公开(公告)号:US12088255B2
公开(公告)日:2024-09-10
申请号:US17344789
申请日:2021-06-10
申请人: NXP USA, Inc.
CPC分类号: H03F1/0288 , H03F3/211
摘要: A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.
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公开(公告)号:US20220399856A1
公开(公告)日:2022-12-15
申请号:US17344789
申请日:2021-06-10
申请人: NXP USA, Inc.
摘要: A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.
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6.
公开(公告)号:US20190173430A1
公开(公告)日:2019-06-06
申请号:US15830477
申请日:2017-12-04
申请人: NXP USA, Inc.
摘要: Embodiments of a multiple-path amplifier (e.g., a Doherty amplifier) and a module housing the amplifier include a first amplifier (or first power transistor die) with a first output terminal, a second amplifier (or second power transistor die) with a second output terminal, and an impedance inverter line assembly electrically connected between the first and second output terminals. The impedance inverter line assembly includes a first transmission line and a surface mount component connected in series between the first and second output terminals. In various embodiments, the surface mount component is selected from a fixed-value capacitor, a fixed-value inductor, a tunable capacitor, a tunable inductor, and a tunable passive component network.
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公开(公告)号:US20210175186A1
公开(公告)日:2021-06-10
申请号:US16704283
申请日:2019-12-05
申请人: NXP USA, Inc.
IPC分类号: H01L23/66 , H03F1/02 , H01L23/495
摘要: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.
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8.
公开(公告)号:US10284146B2
公开(公告)日:2019-05-07
申请号:US15366550
申请日:2016-12-01
申请人: NXP USA, Inc.
发明人: Yu-Ting Wu , Nick Yang , Joseph Gerard Schultz
IPC分类号: H03F3/68 , H03F1/02 , H03F3/195 , H03F3/21 , H01L23/66 , H01L23/00 , H01L23/538 , H03F3/189 , H03F3/24
摘要: An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
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公开(公告)号:US10250197B1
公开(公告)日:2019-04-02
申请号:US15804268
申请日:2017-11-06
申请人: NXP USA, Inc.
发明人: Joseph Schultz , Enver Krvavac , Yu-Ting David Wu , Nick Yang , Jeffrey Jones , Mario Bokatius , Ricardo Uscola
摘要: A multiple-stage amplifier includes a driver stage die and a final stage die. The final stage die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a first transistor. The driver stage die includes another type of semiconductor substrate (e.g., a silicon substrate), a second transistor, and one or more secondary circuits that are electrically coupled to a control terminal of the first transistor. A connection (e.g., a wirebond array or other DC-coupled connection) is electrically coupled between an RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. The secondary circuit(s) of the driver stage die include a final stage bias circuit and/or a final stage harmonic control circuit, which are electrically connected to the final stage die through various connections.
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10.
公开(公告)号:US20180159479A1
公开(公告)日:2018-06-07
申请号:US15366550
申请日:2016-12-01
申请人: NXP USA, Inc.
发明人: Yu-Ting Wu , Nick Yang , Joseph Gerard Schultz
CPC分类号: H03F1/0288 , H01L23/538 , H01L23/66 , H01L24/06 , H01L24/46 , H01L24/49 , H01L2223/6611 , H01L2223/6644 , H01L2223/6683 , H01L2224/04042 , H01L2224/4917 , H01L2224/49176 , H03F3/189 , H03F3/195 , H03F3/211 , H03F3/24 , H03F2200/114 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/432 , H03F2200/451 , H03F2203/21103 , H03F2203/21106
摘要: An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
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