公开(公告)号：US20180175802A1

公开(公告)日：2018-06-21

申请号：US15846162

申请日：2017-12-18

Applicant: NXP USA, Inc.

Inventor： Yu-Ting David Wu ,  Enver Krvavac ,  Joseph Gerard Schultz ,  Nick Yang ,  Damon G. Holmes ,  Shishir Ramasare Shukla ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Mario Bokatius

IPC: H03F1/02 ,  H01L27/06 ,  H01L23/66 ,  H03F3/195 ,  H03F1/56 ,  H03F3/213

CPC classification number: H03F1/0288 ,  H01L23/66 ,  H01L27/0629 ,  H01L27/085 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2223/6677 ,  H03F1/56 ,  H03F1/565 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/451

Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

公开(公告)号：US10381984B2

公开(公告)日：2019-08-13

申请号：US15846162

申请日：2017-12-18

Applicant: NXP USA, Inc.

Inventor： Yu-Ting David Wu ,  Enver Krvavac ,  Joseph Gerard Schultz ,  Nick Yang ,  Damon G. Holmes ,  Shishir Ramasare Shukla ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Mario Bokatius

IPC: H03F3/68 ,  H03F1/02 ,  H01L27/06 ,  H01L23/66 ,  H03F3/195 ,  H03F1/56 ,  H03F3/213 ,  H01L27/085

Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

公开(公告)号：US10263067B2

公开(公告)日：2019-04-16

申请号：US15593366

申请日：2017-05-12

Applicant: NXP USA, INC.

Inventor： Joseph Gerard Schultz ,  Yu-Ting Wu ,  Shishir Ramasare Shukla ,  Enver Krvavac ,  Hussain Hasanali Ladhani ,  Damon G. Holmes

IPC: H01L23/66 ,  H01L49/02 ,  H01L23/00 ,  H01L23/498 ,  H03F3/19 ,  H03F3/24

Abstract: A radio frequency (RF) chip capacitor circuit and structure are provided. The circuit and structure include a plurality of capacitors connected in series. Each capacitor of the plurality includes a first plate formed from a first metal layer and a second plate formed from a second metal layer. A first two adjacent capacitors of the plurality include first plates formed in a first contiguous portion of the first metal layer or second plates formed in a second contiguous portion of the second metal layer. Each capacitor of the plurality may include a dielectric layer disposed between the first plate and the second plate.