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1.发明公开公开(公告)号：US20240072740A1
公开(公告)日：2024-02-29
申请号：US17823127
申请日：2022-08-30
申请人： NXP USA, Inc.
CPC分类号： H03F3/245 , H01L23/66 , H03F1/0288 , H03F3/195 , H01L2223/6611 , H01L2223/6616 , H01L2223/6655 , H03F2200/451
摘要： A power amplifier device includes first and second power transistor dies and a substrate. Each die includes an elongated bondpad and an integrated transistor with a terminal that is coupled to the elongated bondpad. The substrate is formed from a stack of multiple dielectric layers and multiple patterned conductive layers in an alternating arrangement, and a plurality of conductive vias electrically coupling portions of the conductive layers. The substrate includes elongated first and second die contacts exposed at a first substrate surface and connected to the first and second elongated bondpads, respectively. The substrate also includes a conductive structure connected between the first and second die contacts. The conductive structure is formed from portions of the patterned conductive layers and at least two vias of the plurality of conductive vias.
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公开(公告)号：US20230361726A1
公开(公告)日：2023-11-09
申请号：US18176208
申请日：2023-02-28
申请人： NXP USA, Inc.
IPC分类号： H03F3/19
CPC分类号： H03F3/19 , H03F2200/165 , H03F2200/171 , H03F2200/222 , H03F2200/387 , H03F2200/451
摘要： An RF amplifier includes at least one harmonic trap filter with an array of shunt filter legs having a non-uniform resonance frequency distribution. The harmonic trap filter is configured to suppress frequencies in a suppression frequency range that includes harmonic frequencies of carrier frequencies in a range of carrier frequencies. Each of the shunt filter legs includes a capacitor and inductor coupled in series, and an intermediate node coupled between the capacitor and the inductor. Each intermediate node of the shunt filter leg is coupled to at least one other intermediate node of another shunt filter leg of the filter with a dampening resistor. Shunt filters at or near edges of the array are configured to have lower resonance frequencies than those at or near the center of the array to suppress excess current flow at edges of the RF amplifier.
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公开(公告)号：US20220182022A1
公开(公告)日：2022-06-09
申请号：US17110568
申请日：2020-12-03
申请人： NXP USA, Inc.
摘要： An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
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4.发明授权公开(公告)号：US11558018B2
公开(公告)日：2023-01-17
申请号：US16775573
申请日：2020-01-29
申请人： NXP USA, Inc.
发明人： Joseph Gerard Schultz , Kevin Kim
IPC分类号： H03F1/52 , H01L23/522 , H01L23/528 , H01L27/02 , H01L49/02 , H01L29/78 , H03F1/02 , H03F3/213
摘要： Integrated circuits, such as power amplifier integrated circuits, are disclosed containing compact-footprint, vertically-integrated capacitor-avalanche diode (AD) structures. In embodiments, the integrated circuit includes a semiconductor substrate, a metal layer system, and a vertically-integrated capacitor-AD structure. The metal layer system includes, in turn, a body of dielectric material in which a plurality of patterned metal layers are located. The vertically-integrated capacitor-AD structure includes a first AD formed, at least in part, by patterned portions of the first patterned metal layer. A first metal-insulator-metal (MIM) capacitor is also formed in the metal layer system and at least partially overlaps with the first AD, as taken along a vertical axis orthogonal to the principal surface of the semiconductor substrate. In certain instances, at least a majority, if not the entirety of the first AD vertically overlaps with the first MIM capacitor, by surface area, as taken along the vertical axis.
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公开(公告)号：US20210175186A1
公开(公告)日：2021-06-10
申请号：US16704283
申请日：2019-12-05
申请人： NXP USA, Inc.
IPC分类号： H01L23/66 , H03F1/02 , H01L23/495
摘要： An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.
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6.发明授权公开(公告)号：US10284146B2
公开(公告)日：2019-05-07
申请号：US15366550
申请日：2016-12-01
申请人： NXP USA, Inc.
发明人： Yu-Ting Wu , Nick Yang , Joseph Gerard Schultz
IPC分类号： H03F3/68 , H03F1/02 , H03F3/195 , H03F3/21 , H01L23/66 , H01L23/00 , H01L23/538 , H03F3/189 , H03F3/24
摘要： An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
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公开(公告)号：US10236852B2
公开(公告)日：2019-03-19
申请号：US15373953
申请日：2016-12-09
申请人： NXP USA, INC.
摘要： An integrated circuit (IC) includes an input pad and an output pad separated from the input pad by a predetermined distance. A plurality of capacitors are coupled in series between the input pad and the output pad. The plurality of capacitors are distributed to substantially span the predetermined distance. An inductor is formed from a bond wire, having a first end attached at the first input pad and a second end attached at the output pad. The inductor and plurality of capacitors configured to form a predetermined open circuit resonance.
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8.发明申请公开(公告)号：US20180159479A1
公开(公告)日：2018-06-07
申请号：US15366550
申请日：2016-12-01
申请人： NXP USA, Inc.
发明人： Yu-Ting Wu , Nick Yang , Joseph Gerard Schultz
CPC分类号： H03F1/0288 , H01L23/538 , H01L23/66 , H01L24/06 , H01L24/46 , H01L24/49 , H01L2223/6611 , H01L2223/6644 , H01L2223/6683 , H01L2224/04042 , H01L2224/4917 , H01L2224/49176 , H03F3/189 , H03F3/195 , H03F3/211 , H03F3/24 , H03F2200/114 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/432 , H03F2200/451 , H03F2203/21103 , H03F2203/21106
摘要： An embodiment of a Doherty amplifier module includes a substrate, a first amplifier die, and a second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. The first and second amplifier die each also include an elongated output pad that is configured to enable a pluralities of wirebonds to be connected in parallel along the length of the elongated output pad so that the pluralities of wirebonds extend in perpendicular directions to the first and second signal paths.
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公开(公告)号：US20240071960A1
公开(公告)日：2024-02-29
申请号：US17823116
申请日：2022-08-30
申请人： NXP USA, Inc.
CPC分类号： H01L23/66 , H03F1/0288 , H03F3/195 , H03F3/245 , H01L2223/6611 , H01L2223/6622 , H01L2223/6655 , H03F2200/451
摘要： A power amplifier device includes a substrate, a power transistor die, and one or more surface mount components. The substrate has substrate die contacts exposed at a first substrate surface, and additional substrate contacts exposed at a second substrate surface. The power transistor die includes an integrated transistor. The transistor includes a control terminal and a first current conducting terminal coupled, respectively, to first and second die contacts at the first die surface, and a second current conducting terminal coupled to a third die contact at a second die surface. The surface-mount components are connected to the additional substrate components, and the surface-mount components are electrically coupled through the substrate to the first and second die contacts. The power amplifier device also includes an encapsulation material layer covering the surface-mount components and the second substrate surface.
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公开(公告)号：US11223326B2
公开(公告)日：2022-01-11
申请号：US16938027
申请日：2020-07-24
申请人： NXP USA, Inc.
发明人： Joseph Gerard Schultz , Enver Krvavac , Olivier Lembeye , Cedric Cassan , Kevin Kim , Jeffrey Kevin Jones
IPC分类号： H03F1/02 , H03F1/56 , H03F3/195 , H03F3/21 , H03F3/24 , H01L23/66 , H03F3/213 , H04B1/04 , H01L29/20
摘要： A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.
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