公开(公告)号：US08331897B2

公开(公告)日：2012-12-11

申请号：US12192933

申请日：2008-08-15

申请人： Namsoo Kim ,  Prasad S. Gudem ,  Vladimir Aparin

发明人： Namsoo Kim ,  Prasad S. Gudem ,  Vladimir Aparin

IPC分类号： H04B1/26

CPC分类号： H03D7/163 ,  H03D7/1466 ,  H03D7/166

摘要： A communication channel has a highly linear switched current mixer that incorporates passive filtering (e.g., low pass, notch) for improved transmitting (Tx) and receiving (Rx) with adding external filtering components. A high IIP2 (input referenced second order intercept point) of the receiver at the Tx offset is essential to avoid corrupting the system's sensitivity performance, and a high triple beat (TB) is required to avoid sensitivity degradation due to transmitter leakage. Thanks to the embedded filtering in the mixer and the active post-distortion (APD) method in a low noise amplifier (LNA), the required high linearity is achieved with low noise figure and power consumption, overcoming transmitter power leakage without the use of a SAW (surface acoustic wave) filter.

摘要翻译： 通信通道具有高度线性的开关电流混频器，其结合无源滤波（例如，低通，陷波），用于增加外部滤波组件以改善发射（Tx）和接收（Rx）。 接收机在Tx偏移处的高IIP2（输入参考二阶截取点）对于避免破坏系统的灵敏度性能至关重要，并且需要高三重（TB）以避免由于发射机泄漏导致的灵敏度劣化。 由于混频器中的嵌入式滤波器和低噪声放大器（LNA）中的有源后失真（APD）方法，所需的高线性度可通过低噪声系数和功耗实现，克服发射机功率泄漏而不使用 SAW（表面声波）滤波器。

公开(公告)号：US20090252252A1

公开(公告)日：2009-10-08

申请号：US12192933

申请日：2008-08-15

申请人： Namsoo Kim ,  Prasad S. Gudem ,  Vladimir Aparin

发明人： Namsoo Kim ,  Prasad S. Gudem ,  Vladimir Aparin

IPC分类号： H04L27/02

CPC分类号： H03D7/163 ,  H03D7/1466 ,  H03D7/166

摘要： A communication channel has a highly linear switched current mixer that incorporates passive filtering (e.g., low pass, notch) for improved transmitting (Tx) and receiving (Rx) with adding external filtering components. A high IIP2 (input referenced second order intercept point) of the receiver at the Tx offset is essential to avoid corrupting the system's sensitivity performance, and a high triple beat (TB) is required to avoid sensitivity degradation due to transmitter leakage. Thanks to the embedded filtering in the mixer and the active post-distortion (APD) method in a low noise amplifier (LNA), the required high linearity is achieved with low noise figure and power consumption, overcoming transmitter power leakage without the use of a SAW (surface acoustic wave) filter.

摘要翻译： 通信通道具有高度线性的开关电流混频器，其结合无源滤波（例如，低通，陷波），用于增加外部滤波组件以改善发射（Tx）和接收（Rx）。 接收机在Tx偏移处的高IIP2（输入参考二阶截取点）对于避免破坏系统的灵敏度性能至关重要，并且需要高三重（TB）以避免由于发射机泄漏导致的灵敏度劣化。 由于混频器中的嵌入式滤波器和低噪声放大器（LNA）中的有源后失真（APD）方法，所需的高线性度可通过低噪声系数和功耗实现，克服发射机功率泄漏而不使用 SAW（表面声波）滤波器。

公开(公告)号：US20090153244A1

公开(公告)日：2009-06-18

申请号：US11959196

申请日：2007-12-18

申请人： Jose Cabanillas ,  Prasad S. Gudem ,  Namsoo Kim ,  Cristian Marcu ,  Anup Savla

发明人： Jose Cabanillas ,  Prasad S. Gudem ,  Namsoo Kim ,  Cristian Marcu ,  Anup Savla

IPC分类号： H03F3/45

CPC分类号： H03F3/45188 ,  H03F1/3205 ,  H03F1/3211 ,  H03F2203/45318 ,  H03F2203/45396

摘要： A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.

摘要翻译： 差分低噪声放大器（LNA）涉及两个偏置饱和的主放大晶体管，两个取消晶体管偏置为次阈值。 在一个示例中，取消晶体管的栅极以对称和交叉耦合的方式耦合到主晶体管的漏极。 主晶体管是源极退化的。 因为取消晶体管的栅极没有耦合到LNA的差分输入引线，所以LNA的输入电容减小。 由于存在两个阶段，由于在子阈值区域偏置的取消晶体管而导入到LNA输出中的噪声被减小。 第一级涉及主晶体管，第二级涉及取消晶体管。 通过增加第一级的增益并降低第二级的增益，保持整体LNA增益，同时降低子阈值偏置晶体管对LNA输出有贡献的噪声。

公开(公告)号：US07944298B2

公开(公告)日：2011-05-17

申请号：US11959196

申请日：2007-12-18

申请人： Jose Cabanillas ,  Prasad S. Gudem ,  Namsoo Kim ,  Cristian Marcu ,  Anup Savla

发明人： Jose Cabanillas ,  Prasad S. Gudem ,  Namsoo Kim ,  Cristian Marcu ,  Anup Savla

IPC分类号： H03F3/45

CPC分类号： H03F3/45188 ,  H03F1/3205 ,  H03F1/3211 ,  H03F2203/45318 ,  H03F2203/45396

摘要： A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.

摘要翻译： 差分低噪声放大器（LNA）涉及两个偏置饱和的主放大晶体管，两个取消晶体管偏置为次阈值。 在一个示例中，取消晶体管的栅极以对称和交叉耦合的方式耦合到主晶体管的漏极。 主晶体管是源极退化的。 因为取消晶体管的栅极没有耦合到LNA的差分输入引线，所以LNA的输入电容减小。 由于存在两个阶段，由于在子阈值区域偏置的取消晶体管而导入到LNA输出中的噪声被减小。 第一级涉及主晶体管，第二级涉及取消晶体管。 通过增加第一级的增益并降低第二级的增益，保持整体LNA增益，同时降低子阈值偏置晶体管对LNA输出有贡献的噪声。

公开(公告)号：US08767869B2

公开(公告)日：2014-07-01

申请号：US13587792

申请日：2012-08-16

申请人： Roberto Rimini ,  Peter D. Heldmann ,  Prasad S. Gudem ,  Sumit Verma ,  Joseph Burke

发明人： Roberto Rimini ,  Peter D. Heldmann ,  Prasad S. Gudem ,  Sumit Verma ,  Joseph Burke

IPC分类号： H04L25/03 ,  H04L25/49 ,  H04K1/02

CPC分类号： H04B1/109 ,  H04B1/30 ,  H04B1/525

摘要： Certain aspects of the present disclosure propose an adaptive joint linear and non-linear digital filter that can adaptively estimate and reconstruct cascaded effects of linear and non-linear self-jamming distortions introduced by non-linearities in the transmit and/or receive chains. The proposed digital filter may be used to cancel second-order inter-modulation distortion (IM2) generated in the receive chain and/or harmonic distortion generated in the transmit chain, as well as other distortions introduced by the transmit/and or receive chains.

摘要翻译： 本公开的某些方面提出了一种自适应联合线性和非线性数字滤波器，其可以自适应地估计和重建由发送和/或接收链中的非线性引入的线性和非线性自干扰失真的级联效应。 所提出的数字滤波器可以用于消除在接收链中产生的二阶互调失真（IM2）和/或在发送链中产生的谐波失真以及由发送/和/或接收链引入的其他失真。

公开(公告)号：US08571510B2

公开(公告)日：2013-10-29

申请号：US12193695

申请日：2008-08-18

申请人： Li Liu ,  Prasad S. Gudem

发明人： Li Liu ,  Prasad S. Gudem

IPC分类号： H04B1/18 ,  H04B1/26 ,  H04B1/28

CPC分类号： H03F1/32 ,  H03F1/0277 ,  H03F1/223 ,  H03F1/56 ,  H03F3/45188 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/336 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45726 ,  H03F2203/7206 ,  H03F2203/7236 ,  H04B1/109 ,  H04B1/18

摘要： A receiver includes a low noise amplifier (LNA) and multiple pairs of mixers. The LNA receives and amplifies an LNA input signal and provides at least one LNA output signal. Each pair of mixers downconverts one of the at least one LNA output signal when enabled. Each pair of mixers may be selectively enabled or disabled, e.g., based on a mode selected from among multiple modes. In one design, the LNA includes multiple load sections coupled in parallel. Each load section may be selectively enabled or disabled, e.g., based on the selected mode. In one design, first and second pairs of mixers and first and second load sections may be enabled for a high linearity mode. The first pair of mixers and the first load section may be enabled and the second pair of mixers and the second load section may be disabled for a low linearity mode.

摘要翻译： 接收机包括低噪声放大器（LNA）和多对混频器。 LNA接收并放大LNA输入信号并提供至少一个LNA输出信号。 当使能时，每对混频器降低至少一个LNA输出信号之一。 可以例如基于从多个模式中选择的模式来选择性地启用或禁用每对混频器。 在一种设计中，LNA包括并联耦合的多个负载部分。 可以例如基于所选择的模式来选择性地启用或禁用每个加载部分。 在一种设计中，第一和第二对混频器以及第一和第二负载部分可以被启用用于高线性模式。 可以启用第一对混频器和第一负载部分，并且可以对低线性模式禁用第二对混频器和第二负载部分。

公开(公告)号：US08433272B2

公开(公告)日：2013-04-30

申请号：US12233420

申请日：2008-09-18

申请人： Prasad S. Gudem ,  Jose Cabanillas ,  Li-Chung Chang ,  Li Liu

发明人： Prasad S. Gudem ,  Jose Cabanillas ,  Li-Chung Chang ,  Li Liu

IPC分类号： H04K3/00 ,  H04B1/06 ,  H04B7/00

CPC分类号： H04B1/109 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/193 ,  H03F3/245

摘要： A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.

摘要翻译： 接收机包括干扰检测器，其被配置为检测在增益状态内的通信信号中存在或不存在干扰。 接收器还包括放大器，被配置为以高线性度接收模式或低线性度接收模式放大通信信号，其中高线性度接收模式对应于放大器相对于低线性度的增益状态的较低增益 接收模式。 此外，接收机包括耦合到干扰检测器的处理单元，该处理单元被配置为基于干扰信号的输出来控制放大器以高线性接收模式或低线性度接收模式放大通信信号 检测器检测通信信号中是否存在干扰。 还提供了一种用于处理接收机中的通信信号的方法。

公开(公告)号：US20130044791A1

公开(公告)日：2013-02-21

申请号：US13587792

申请日：2012-08-16

申请人： Roberto Rimini ,  Peter D. Heidmann ,  Prasad S. Gudem ,  Sumit Verma ,  Joseph Burke

发明人： Roberto Rimini ,  Peter D. Heidmann ,  Prasad S. Gudem ,  Sumit Verma ,  Joseph Burke

IPC分类号： H04B1/44

CPC分类号： H04B1/109 ,  H04B1/30 ,  H04B1/525

摘要： Certain aspects of the present disclosure propose an adaptive joint linear and non-linear digital filter that can adaptively estimate and reconstruct cascaded effects of linear and non-linear self-jamming distortions introduced by non-linearities in the transmit and/or receive chains. The proposed digital filter may be used to cancel second-order inter-modulation distortion (IM2) generated in the receive chain and/or harmonic distortion generated in the transmit chain, as well as other distortions introduced by the transmit/and or receive chains.

摘要翻译： 本公开的某些方面提出了一种自适应联合线性和非线性数字滤波器，其可以自适应地估计和重建由发送和/或接收链中的非线性引入的线性和非线性自干扰失真的级联效应。 所提出的数字滤波器可以用于消除在接收链中产生的二阶互调失真（IM2）和/或在发送链中产生的谐波失真以及由发送/和/或接收链引入的其他失真。

公开(公告)号：US20090212835A1

公开(公告)日：2009-08-27

申请号：US12037503

申请日：2008-02-26

申请人： Yang Xu ,  Gang Zhang ,  Prasad S. Gudem

发明人： Yang Xu ,  Gang Zhang ,  Prasad S. Gudem

IPC分类号： H03L7/08

CPC分类号： H03L7/1974

摘要： The clock signal supplied to the delta-sigma modulator in a fractional-N phase-locked loop is dithered. In one example, the PLL includes a novel programmable clock dithering circuit. The programmable clock dithering circuit is controllable via a serial bus to dither the phase of the clock signal in a selected one of several ways. If the clock signal is dithered in a first way (pseudo-random phase dithering), then the power of digital noise generated by the delta-sigma modulator is spread over a frequency band, thereby reducing the degree to which the noise interferes with other circuitry. If the clock signal is dithered in a second way (rotational phase dithering), then the power of digital noise is frequency shifted such that the degree to which the noise interferes with the other circuitry is reduced. The programmable clock dithering circuit can be controlled in other ways. For example, dithering can be programmably disabled.

摘要翻译： 在分数N锁相环中提供给Δ-Σ调制器的时钟信号被抖动。 在一个示例中，PLL包括新颖的可编程时钟抖动电路。 可编程时钟抖动电路可通过串行总线进行控制，以选择的几种方式对时钟信号的相位进行抖动。 如果时钟信号以第一种方式抖动（伪随机相位抖动），则由Δ-Σ调制器产生的数字噪声的功率在频带上扩展，从而降低噪声干扰其他电路的程度 。 如果时钟信号以第二种方式抖动（旋转相位抖动），则数字噪声的功率被频移，使得噪声干扰另一电路的程度降低。 可编程时钟抖动电路可以以其他方式进行控制。 例如，抖动可以可编程地禁用。

公开(公告)号：US20090051424A1

公开(公告)日：2009-02-26

申请号：US11842712

申请日：2007-08-21

申请人： Li Liu ,  Prasad S. Gudem

发明人： Li Liu ,  Prasad S. Gudem

IPC分类号： H03F1/26 ,  H03F3/04 ,  H03F3/16

CPC分类号： H04B1/109 ,  H03F1/223 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/45179 ,  H03F3/45188 ,  H03F2200/453 ,  H03F2203/45306 ,  H03F2203/45352 ,  H03F2203/45386 ,  H03F2203/45394 ,  H04B1/525

摘要： Active circuits with active loads linearized via distortion cancellation are described. In one design, an apparatus includes a first stage and a load stage. For an amplifier, the first stage amplifies an input signal and provides an output signal having a larger signal level. For a mixer, the first stage mixes an input signal with an LO signal and provides an output signal. The load stage provides an active load for the first stage and is linearized by canceling distortion generated by the active load. In one design, the load stage includes a first transistor that provides the active load and generates distortion due to its nonlinearity. The load stage further includes at least one transistor that generates a replica of the distortion from the first transistor. The distortion replica is used to cancel the distortion from the first transistor. The first stage may also be linearized with distortion cancellation.

摘要翻译： 描述了通过失真消除线性化的有源负载的有源电路。 在一种设计中，装置包括第一级和负载级。 对于放大器，第一级放大输入信号并提供具有较大信号电平的输出信号。 对于混频器，第一级将输入信号与LO信号混频并提供输出信号。 负载级为第一级提供有效负载，并通过消除由有效负载产生的失真来线性化。 在一种设计中，负载级包括提供有源负载并由于其非线性而产生失真的第一晶体管。 负载级还包括至少一个晶体管，其产生来自第一晶体管的失真的复制品。 失真复制品用于消除第一晶体管的失真。 第一级也可以通过失真消除线性化。