摘要:
A processor includes a computation unit; a storage unit storing a program; and a data transmission circuit that transmits to an operation monitoring unit a signal corresponding to an instruction for reporting the execution stage of the program. The operation monitoring unit: includes a transition operation identification. circuit and a loop processing identification circuit. The transition operation identification circuit receives a start ID instruction with an attached ID that identifies a task; a termination ID instruction that identifies termination of task operation; and if the task is execution of loop processing, a loop instruction that reports the maximum value of the number of times of this loop processing. The transition operation identification circuit identifies success of the transition operations of the tasks of the program, based on the ID instructions. The loop processing identification circuit identifies abnormality of the number of times of loop processing.
摘要:
A clock diagnosis circuit includes: a delay circuit to delay the clock by a prescribed time which is not more than the clock pulse width; an integral multiplication delay circuit to delay a delayed clock outputted from the delay circuit by a prescribed number of cycles; a first exclusive OR circuit to encode the clock using the delayed clock; a second exclusive OR circuit to decode an output of the first exclusive OR circuit using an output of the integral multiplication delay circuit; and a comparison circuit to compare the clock with an output of the second exclusive OR circuit to thereby detect a malfunction of the clock.
摘要:
A clock diagnosis circuit includes: a delay circuit to delay the clock by a prescribed time which is not more than the clock pulse width; an integral multiplication delay circuit to delay a delayed clock outputted from the delay circuit by a prescribed number of cycles; a first exclusive OR circuit to encode the clock using the delayed clock; a second exclusive OR circuit to decode an output of the first exclusive OR circuit using an output of the integral multiplication delay circuit; and a comparison circuit to compare the clock with an output of the second exclusive OR circuit to thereby detect a malfunction of the clock.
摘要:
A redundancy control system and method of transmitting computational data are provided, for detection of transmission errors and failure diagnosis, including generating first computational data and generating first generated data using a first generation algorithm for error detection; generating second computational data and generating second generated data using a second generation algorithm for error detection; comparing the first/second computational data; transmitting transmission data including coincident computational data and the first/second generated data; generating, in the receiving device, computational data and third/fourth generated data from preset first/second generation algorithms; and comparing the first/third generated data and the first/third generated data, and detecting the presence or absence of an error in the received computational data.
摘要:
A method of transmitting computational data comprising: a step of generating first computational data and generating first generated data using a first generation algorithm for error detection on return; a step of generating second computational data and generating second generated data using a second generation algorithm for error detection; a step of mutually comparing the first/second computational data; a step of transmitting transmission data including coincident computational data and first/second generated data; in the receiving device, a step of generating computational data and third/fourth generated data from preset first/second generation algorithms; and a step of comparing the first/third generated data and the first/third generated data, and detecting error in the received computational data.
摘要:
An object is to provide a redundant supervisory control system and a redundancy switching method thereof. In the redundant supervisory control system, remote I/O apparatuses are less likely to be inaccessible, even in a case where failures occur in plural locations. Thus, the reliability of the system is enhanced. The redundant supervisory control system including a plurality of first loop interface units in each of a pair of controllers, second loop interface units, and communication cables each connecting the plurality of first and second loop interface units with one another in a circular loop. The redundant supervisory control system is configured by connecting the controllers and the remote I/O units to one another in a plurality of loop networks. In a case where abnormality in the loop networks is detected by use of received data in the networks, the first and second loop interface units that can perform normal reception are automatically selected.
摘要:
An object is to provide a redundant supervisory control system and a redundancy switching method thereof. In the redundant supervisory control system, remote I/O apparatuses are less likely to be inaccessible, even in a case where failures occur in plural locations. Thus, the reliability of the system is enhanced. The redundant supervisory control system including a plurality of first loop interface units in each of a pair of controllers, second loop interface units, and communication cables each connecting the plurality of first and second loop interface units with one another in a circular loop. The redundant supervisory control system is configured by connecting the controllers and the remote I/O units to one another in a plurality of loop networks. In a case where abnormality in the loop networks is detected by use of received data in the networks, the first and second loop interface units that can perform normal reception are automatically selected.
摘要:
A safety output includes an output controller to make an instruction to output normal output data and first self-diagnosis pattern data synchronously with a control cycle, a normal output unit to output the normal output data synchronously with the control cycle, a test pattern generating unit to encode the self-diagnosis pattern data into a pulse train signal having a pulse width not larger than a preset value and output the pulse train signal in accordance with a baseband transmission system, a combination output unit to combine the pulse train signal with the normal output signal and output the resultant signal, a reconfiguration unit to decode the inputted operation-terminal-portion output signal to reconfigure the operation-terminal-portion output signal as second self-diagnosis pattern data, and a comparator to compare the first self-diagnosis pattern data with the second self-diagnosis pattern data to judge the presence or absence of a difference.
摘要:
A safety input device includes an input controller to control transmission of an input signal to an arithmetic device synchronously with a control cycle set by the arithmetic device, an output controller to instruct output of preset first self-diagnosis pattern data, a test pattern generating unit to encode the first self-diagnosis pattern data into a pulse train signal having a pulse width equal to or below a predetermined value and output the pulse train signal in accordance with a baseband transmission system, a combination input unit to combine the pulse train signal with the input signal, an input interface unit, a pattern reconfiguration unit to decode an output signal from the combination input unit into second self-diagnosis pattern data, and a comparator to compare the first and second self-diagnosis pattern data to judge the presence or absence of a difference between the first and second self-diagnosis pattern data.
摘要:
A safety input device includes an input controller to control transmission of an input signal to an arithmetic device, an output controller to instruct output of preset first self-diagnosis pattern data, a test pattern generating unit to encode the first self-diagnosis pattern data into a pulse train signal having a pulse width equal to or below a predetermined value and output the pulse train signal, a combination input unit to combine the pulse train signal with the input signal, an input interface unit, a pattern reconfiguration unit to decode an output signal from the combination input unit into second self-diagnosis pattern data, and a comparator to compare the first and second self-diagnosis pattern data to judge the presence or absence of a difference between the first and second self-diagnosis pattern data.