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公开(公告)号：US08286064B2
公开(公告)日：2012-10-09
申请号：US12738621
申请日：2008-10-30
IPC分类号： G06F11/00
CPC分类号： H03M13/1102 , H03M13/23 , H03M13/255 , H03M13/356 , H03M13/373 , H03M13/6362 , H04L1/005 , H04L1/0057 , H04L1/0059 , H04L1/0069 , H04L1/0071 , H04L1/06 , H04L5/0044 , H04L27/2626 , H04L27/3422
摘要： Provided is a transmission device which improves the error rate characteristic upon decoding when performing error correction encoding by using a self-orthogonal code or an LDPC-CC in a communication system using a communication path having a fading fluctuation, multi-value modulation, or MIMO transmission. In the transmission device, the self-orthogonal encoding unit (110) encodes a self-orthogonal code having a constriction length K and an interleave unit (130) rearranges a code word sequence so that the same modulation symbol includes an information bit of a moment i and a non-correlated bit of the information bit of the moment i in a multi-value modulation unit (150).
摘要翻译： 提供一种传输装置，其在使用具有衰落波动，多值调制或MIMO的通信路径的通信系统中通过使用自正交码或LDPC-CC进行纠错编码时，提高解码时的错误率特性 传输。 在发送装置中，自正交编码单元（110）编码具有收缩长度K的自正交码和交织单元（130）重新排列码字序列，使得相同的调制符号包括一个信息位 i和多值调制单元（150）中的时刻i的信息比特的非相关比特。
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公开(公告)号：US20100180176A1
公开(公告)日：2010-07-15
申请号：US12377107
申请日：2007-08-31
申请人： Naoya Yosoku , Shutai Okamura , Yutaka Murakami
发明人： Naoya Yosoku , Shutai Okamura , Yutaka Murakami
CPC分类号： H03M13/1188 , H03M13/1185
摘要： An encoding method by which an encoding speed is improved is disclosed. An encoder (100) comprises an input data storage section (107) for outputting the stored input data (D100) according to an output control signal (108), an input data count section (101) for counting the inputs of input data (D100), an output control section (102) for controlling the output destination of the input data (D100) according to the input counts, one-bit storage sections (103-1 to 103-(N−K)) for holding one-bit data, row-vector storage sections (104-1 to 104-K) for holding row vectors of an LDPC code creation matrix, vector multiplying sections (105-1 to 105-K) for multiplying a row vector and a column vector, a parity storage section (109) for holding a parity created by the multiplication, and an LDPC code-word series creating section (106); for creating an LDPC code word from the input data series and parity series and outputting it.
摘要翻译： 公开了一种提高编码速度的编码方法。 编码器（100）包括输入数据存储部（107），用于根据输出控制信号（108）输出所存储的输入数据（D100）;输入数据计数部分（101），用于对输入数据（D100 ），用于根据输入计数控制输入数据（D100）的输出目的地的输出控制部分（102），用于保持一位的一位存储部分（103-1至103-（N-K）） 用于保持LDPC码产生矩阵的行向量的数据，行向量存储部分（104-1至104-K），用于乘以行向量和列向量的向量相乘部分（105-1至105-K）， 奇偶校验存储部（109），用于保持乘法生成的奇偶校验; LDPC码字序列生成部（106）; 用于从输入数据序列和奇偶校验序列创建LDPC码字并将其输出。
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公开(公告)号：US20100251061A1
公开(公告)日：2010-09-30
申请号：US12738621
申请日：2008-10-30
CPC分类号： H03M13/1102 , H03M13/23 , H03M13/255 , H03M13/356 , H03M13/373 , H03M13/6362 , H04L1/005 , H04L1/0057 , H04L1/0059 , H04L1/0069 , H04L1/0071 , H04L1/06 , H04L5/0044 , H04L27/2626 , H04L27/3422
摘要： Provided is a transmission device which improves the error rate characteristic upon decoding when performing error correction encoding by using a self-orthogonal code or an LDPC-CC in a communication system using a communication path having a fading fluctuation, multi-value modulation, or MIMO transmission. In the transmission device, the self-orthogonal encoding unit (110) encodes a self-orthogonal code having a constriction length K and an interleave unit (130) rearranges a code word sequence so that the same modulation symbol includes an information bit of a moment i and a non-correlated bit of the information bit of the moment i in a multi-value modulation unit (150).
摘要翻译： 提供一种传输装置，其在使用具有衰落波动，多值调制或MIMO的通信路径的通信系统中通过使用自正交码或LDPC-CC进行纠错编码时，提高解码时的错误率特性 传输。 在发送装置中，自正交编码单元（110）编码具有收缩长度K的自正交码和交织单元（130）重新排列码字序列，使得相同的调制符号包括一个信息位 i和多值调制单元（150）中的时刻i的信息比特的非相关比特。
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公开(公告)号：US20130139038A1
公开(公告)日：2013-05-30
申请号：US13814219
申请日：2011-08-03
申请人： Naoya Yosoku , Shutai Okamura
发明人： Naoya Yosoku , Shutai Okamura
IPC分类号： H03M13/13
CPC分类号： H03M13/13 , H03M13/1111 , H03M13/1131 , H03M13/1137 , H03M13/116 , H03M13/1188 , H03M13/616 , H03M13/6527
摘要： The error correcting decoding device of the present invention performs Low-Density Parity-Check (LDPC) decoding which accommodates a plurality of code rates while sharing circuits to suppress increase in circuit scale. If the set code rate is a second code rate which is a higher code rate than a first code rate, a column processing and row processing calculating unit (120A) uses a distributed submatrix in which a number of columns are selected and combined, wherein the number of columns is equal in number to the number of columns with which a first submatrix is constructed from a distributed check matrix corresponding to a second check matrix which accommodates the second code rate. At this time, the column processing and row processing calculating unit (120A) uses a distributed submatrix such that the row degree is less than or equal to the row degree of the first submatrix.
摘要翻译： 本发明的纠错解码装置执行低密度奇偶校验（LDPC）解码，该解码容纳多个码率，同时共享电路以抑制电路规模的增加。 如果设定码率是比第一码率高的码率的第二码率，列处理和行处理计算单元（120A）使用其中选择并组合列数的分布子矩阵，其中， 列数与从适应第二代码率的第二校验矩阵相对应的分布式校验矩阵构成第一子矩阵的列数相等。 此时，列处理和行处理计算单元（120A）使用分散子矩阵，使得行度小于或等于第一子矩阵的行度。
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公开(公告)号：US08996965B2
公开(公告)日：2015-03-31
申请号：US13814219
申请日：2011-08-03
申请人： Naoya Yosoku , Shutai Okamura
发明人： Naoya Yosoku , Shutai Okamura
CPC分类号： H03M13/13 , H03M13/1111 , H03M13/1131 , H03M13/1137 , H03M13/116 , H03M13/1188 , H03M13/616 , H03M13/6527
摘要： The error correcting decoding device of the present invention performs Low-Density Parity-Check (LDPC) decoding which accommodates a plurality of code rates while sharing circuits to suppress increase in circuit scale. If the set code rate is a second code rate which is a higher code rate than a first code rate, a column processing and row processing calculating unit (120A) uses a distributed submatrix in which a number of columns are selected and combined, wherein the number of columns is equal in number to the number of columns with which a first submatrix is constructed from a distributed check matrix corresponding to a second check matrix which accommodates the second code rate. At this time, the column processing and row processing calculating unit (120A) uses a distributed submatrix such that the row degree is less than or equal to the row degree of the first submatrix.
摘要翻译： 本发明的纠错解码装置执行低密度奇偶校验（LDPC）解码，该解码容纳多个码率，同时共享电路以抑制电路规模的增加。 如果设定码率是比第一码率高的码率的第二码率，列处理和行处理计算单元（120A）使用其中选择并组合列数的分布子矩阵，其中， 列数与从适应第二代码率的第二校验矩阵相对应的分布式校验矩阵构成第一子矩阵的列数相等。 此时，列处理和行处理计算单元（120A）使用分散子矩阵，使得行度小于或等于第一子矩阵的行度。
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6.发明授权Low-density parity-check convolutional code (LDPC-CC) encoding method, encoder and decoder 有权低密度奇偶校验卷积码（LDPC-CC）编码方法，编码器和解码器公开(公告)号：US08745471B2
公开(公告)日：2014-06-03
申请号：US12679740
申请日：2008-09-26
IPC分类号： H03M13/15
CPC分类号： H03M13/1154 , H03M13/1102 , H03M13/118 , H03M13/23 , H03M13/235 , H03M13/6362 , H04L1/0041
摘要： An encoding method and an encoder for creating a low-density parity check convolution code (LDDC-CC), sending a signal sequence after subjecting the code to an error-correction using the low-density parity check convolution code, and creating a low-density parity check code of a time-variant period (3g) by linear operations of first to 3g-th (letter g designates a positive integer) parity check polynomials and input data.
摘要翻译： 一种用于创建低密度奇偶校验卷积码（LDPC-CC）的编码方法和编码器，在使用低密度奇偶校验卷积码对码进行纠错之后发送信号序列， 奇偶校验多项式和输入数据，通过第一至第3g（字母g表示正整数）的线性运算来确定时变周期（3g）的密度奇偶校验码。
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公开(公告)号：US08522109B2
公开(公告)日：2013-08-27
申请号：US12994367
申请日：2009-07-02
申请人： Yutaka Murakami , Shutai Okamura
发明人： Yutaka Murakami , Shutai Okamura
IPC分类号： H03M13/00
CPC分类号： H04L1/0041 , H03M13/1154 , H03M13/17 , H03M13/2703 , H03M13/2707 , H03M13/353 , H03M13/356 , H03M13/373 , H03M13/3761 , H03M13/6306 , H03M13/6356 , H04L1/00 , H04L1/08
摘要： A loss correction encoding device having an improved capability of loss correction using LDPC-CC is disclosed. In the loss correction encoding device (120), a rearranging unit (122) rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q−1)/q of a cheek polynomial of the loss correction code used in a loss correction encoding unit (123). Specifically, the rearranging unit (122) rearranges the information data in such a way that continuous Kmax×(q−1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit (122) distributes the information data to information blocks from n information packets (n satisfies formula (1)). Kmax×(q−1)≦n (1).
摘要翻译： 公开了一种具有改进的使用LDPC-CC的损失校正能力的损失校正编码装置。 在丢失校正编码装置（120）中，重排单元（122）根据约束长度Kmax和丢失校正码的颊多项式的编码率（q-1）/ q重新排列包含在n个信息包中的信息数据 用于损失校正编码单元（123）。 具体地说，重新布置单元（122）重新排列信息数据，使得重排后的连续的Kmax×（q-1）个信息数据被包含在不同的信息包中。 重新布置单元（122）将信息数据分配给来自n个信息包（n满足公式（1））的信息块。 Kmax×（q-1）@n（1）。
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公开(公告)号：US08458577B2
公开(公告)日：2013-06-04
申请号：US12745216
申请日：2008-12-18
IPC分类号： G06F11/00
CPC分类号： H03M13/255 , H03M13/1128 , H03M13/116 , H03M13/118 , H03M13/23 , H03M13/6362 , H03M13/6502 , H03M13/6527
摘要： There is provided an encoder that provides a termination sequence with a simple structure for LDPC-CC encoding and reduces an amount of the termination sequence transmitted to a transmission line. The LDPC-CC encoder (200) connects a first encoder (230) to a second encoder (240) to perform encoding and thereby carry out LDPC-CC encoding, the first encoder (230) performing encoding based on an partial parity check matrix for information bits (110) obtained by extracting a sequence corresponding to the information bits in a parity check matrix (100) and the second encoder (240) performing encoding based on a partial parity check matrix for parity bits (120) obtained by extracting a sequence corresponding to the parity bits in the parity check matrix (100). A termination sequence generator (210) generates a termination sequence including the same number of bits as the memory length of the first encoder (230) and provides the generated termination sequence as an input sequence.
摘要翻译： 提供了一种编码器，其提供具有用于LDPC-CC编码的简单结构的终止序列，并减少发送到传输线的终止序列的量。 LDPC-CC编码器（200）将第一编码器（230）连接到第二编码器（240）以执行编码，从而执行LDPC-CC编码，第一编码器（230）基于部分奇偶校验矩阵执行编码， 通过提取与奇偶校验矩阵（100）中的信息比特相对应的序列获得的信息比特（110）和基于通过提取序列获得的奇偶校验比特（120）的部分奇偶校验矩阵执行编码的第二编码器（240） 对应于奇偶校验矩阵（100）中的奇偶校验位。 终止序列生成器（210）生成包括与第一编码器（230）的存储器长度相同数量的位的终止序列，并且将生成的终止序列提供为输入序列。
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公开(公告)号：US08423871B2
公开(公告)日：2013-04-16
申请号：US12668829
申请日：2008-07-11
CPC分类号： H04L1/0057 , H03M13/1111 , H03M13/235 , H03M13/2707 , H03M13/353 , H03M13/6306 , H04L1/0059 , H04L1/1812 , H04L5/0007 , H04L5/0042
摘要： A transmitting device and method enables improved reception quality on the receiving side when LDPC-CC (Low-Density Parity-Check Convolutional Codes) encoding is used. The transmitting device includes an LDPC-CC encoding section, a sorting section for sorting the encoded data acquired by the LDPC-CC encoding section into a first encoded data set corresponding to the column number of the column containing “1” in a part of an LDPC-CC check matrix H from which a protograph is excluded and a second encoded data set corresponding to the column numbers of the columns other than that, and a frame constructing section (control section) for constructing a transmission frame where the first and second encoded data sets are arranged in positions different in time or frequency in the transmission frame.
摘要翻译： 当使用LDPC-CC（低密度奇偶校验卷积码）编码时，发送装置和方法能够改善接收侧的接收质量。 发送装置包括LDPC-CC编码部分，用于将由LDPC-CC编码部分获取的编码数据分类为与LDPC-CC编码部分的一部分中包含1的列的列号相对应的第一编码数据集的分类部分， 排除原型图的CC校验矩阵H和对应于除此之外的列的列号的第二编码数据集，以及用于构造第一和第二编码数据集的传输帧的帧构成部分（控制部分） 被布置在传输帧中的时间或频率不同的位置。
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公开(公告)号：US08229016B2
公开(公告)日：2012-07-24
申请号：US12294804
申请日：2007-03-30
CPC分类号： H04B7/04 , H04B7/0697 , H04B7/0854 , H04L1/0625 , H04L1/0631 , H04L1/0643
摘要： An MIMO receiver and MIMO communication system which can have a small hardware scale even if the number of antennas used for MIMO communication. In a radio communication device (200), a receiving section (220) receives a spatially multiplexed signal generated by mutually-different and spatially multiplexing transmission signals, a first signal demultiplexing section (230) subjects a linear operation to the received spatial multiplexed signal to demultiplex the spatial multiplexed signal, and a second signal demultiplexing section (240) demultiplexer the demultiplexed spatially multiplexed signal into the transmission signals. When the received signal is demultiplexed by a single demultiplexing, as the number of multiplexed spatial multiplexed signal increases, the demultiplexer becomes complicated, and the hardware scale increases. When the received signal is demultiplexed by a plurality of demultiplexings, the hardware scale is relatively small.
摘要翻译： 即使用于MIMO通信的天线数量，MIMO接收机和MIMO通信系统也可以具有小的硬件规模。 在无线通信装置（200）中，接收部（220）接收通过相互不同的空间复用的发送信号生成的空间复用信号，第一信号解复用部（230）对所接收的空间复用信号进行线性运算 解复用空间多路复用信号，第二信号解复用部分（240）将解复用的空间多路复用信号解复用为传输信号。 当接收到的信号被单解复用解复用时，随着多路复用信号的复用信号数量的增加，解复用器变得复杂，硬件规模增大。 当接收到的信号被多路解复用时，硬件比例相对较小。
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