公开(公告)号：US10134735B2

公开(公告)日：2018-11-20

申请号：US15632391

申请日：2017-06-26

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/20 ,  H01L29/16 ,  H01L21/8238

Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.

公开(公告)号：US11515307B2

公开(公告)日：2022-11-29

申请号：US16893348

申请日：2020-06-04

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L29/20 ,  H01L29/161

Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.

公开(公告)号：US10727231B2

公开(公告)日：2020-07-28

申请号：US16159541

申请日：2018-10-12

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L29/16 ,  H01L29/20 ,  H01L29/161 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.

公开(公告)号：US20190043862A1

公开(公告)日：2019-02-07

申请号：US16159541

申请日：2018-10-12

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/16 ,  H01L21/8238 ,  H01L29/20 ,  H01L29/161

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66795 ,  H01L29/7853

Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.

公开(公告)号：US20200303377A1

公开(公告)日：2020-09-24

申请号：US16893348

申请日：2020-06-04

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/20

Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.

公开(公告)号：US20170373064A1

公开(公告)日：2017-12-28

申请号：US15632391

申请日：2017-06-26

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66795 ,  H01L29/7853

Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.

公开(公告)号：US09281305B1

公开(公告)日：2016-03-08

申请号：US14561377

申请日：2014-12-05

Applicant: National Applied Research Laboratories

Inventor： Chih-Chao Yang ,  Jia-Min Shieh ,  Wen-Hsien Huang ,  Tung-Ying Hsieh ,  Chang-Hong Shen ,  Szu-Hung Chen

IPC: H01L27/06 ,  H01L27/12 ,  H01L29/16 ,  H01L29/04 ,  H01L29/08 ,  H01L29/24 ,  H01L29/786 ,  H01L29/417 ,  H01L21/8238

CPC classification number: H01L27/0688 ,  H01L21/823814 ,  H01L27/1203 ,  H01L29/04 ,  H01L29/0847 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/41783 ,  H01L29/78648 ,  H01L29/78684 ,  H01L29/78696

Abstract: A transistor device structure includes a substrate, a first transistor layer and a second transistor layer. The second transistor layer is disposed between the substrate and the first transistor layer. The first transistor layer includes an insulating structure and a first transistor unit. The insulating structure is disposed on the second transistor layer and has a protruding portion. The first transistor unit includes a gate structure, a source/drain structure, an embedded source/drain structure and a channel. The source/drain structure is disposed beside the gate structure and over the insulating structure. The embedded source/drain structure is disposed underneath the source/drain structure and in the insulating structure. The channel is defined between the protruding portion and the gate structure.

Abstract translation: 晶体管器件结构包括衬底，第一晶体管层和第二晶体管层。 第二晶体管层设置在衬底和第一晶体管层之间。 第一晶体管层包括绝缘结构和第一晶体管单元。 绝缘结构设置在第二晶体管层上并具有突出部分。 第一晶体管单元包括栅极结构，源极/漏极结构，嵌入式源极/漏极结构和沟道。 源极/漏极结构设置在栅极结构旁边和绝缘结构之上。 嵌入式源极/漏极结构设置在源极/漏极结构下方和绝缘结构中。 通道限定在突出部分和栅极结构之间。