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公开(公告)号:US20250089356A1
公开(公告)日:2025-03-13
申请号:US18926357
申请日:2024-10-25
Inventor: Atsushi YAO , Mitsuo OKAMOTO , Fumiki KATO , Hiroshi SATO , Shinsuke HARADA , Hiroshi HOZOJI , Shinji SATO
IPC: H01L27/092 , H01L23/522 , H01L25/065 , H01L29/16 , H03K17/0412
Abstract: A change in switching time due to temperature change is suppressed. A switching circuitry is provided with a resistance component having opposite characteristics to temperature dependence of a gate current of a power transistor which is switching-controlled by the switching circuitry, and a change in a gate current due to the temperature change is suppressed by a change in the above-described resistance component due to the temperature change.
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公开(公告)号:US20240266351A1
公开(公告)日:2024-08-08
申请号:US18563937
申请日:2022-04-28
Inventor: Mitsuo OKAMOTO , Atsushi YAO , Hiroshi SATO , Shinsuke HARADA
CPC classification number: H01L27/0922 , H01L21/0465 , H01L21/049 , H01L21/8213 , H01L29/063 , H01L29/1608 , H01L29/66068 , H01L29/7813 , H01L29/7816
Abstract: A semiconductor device includes, on an n-type semiconductor substrate, a power transistor, an n-type transistor, and a p-type transistor on a laminated semiconductor substrate that laminates an n-type drift layer, a p-type; the power transistor has a trench gate electrode penetrating through the base layer; the p-type transistor is formed in an n-type well region formed in the base layer, and the n-type transistor is formed in a p-type well region further formed in the base layer or n-type well region; and a p-type impurity concentration of the buried channel region of the p-type transistor is equal to a p-type impurity concentration of the base layer.
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