Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate
    1.
    发明申请
    Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate 有权
    形成记忆单元阵列的方法,形成多个场效应晶体管的方法,形成源极/漏极区域的方法和隔离沟槽以及将一系列间距沟槽形成基板的方法

    公开(公告)号:US20120021573A1

    公开(公告)日:2012-01-26

    申请号:US13248791

    申请日:2011-09-29

    IPC分类号: H01L21/8234 H01L21/302

    摘要: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.

    摘要翻译: 将一系列间隔开的沟槽形成到衬底中的方法包括在衬底上形成多个间隔开的线。 各向异性蚀刻的侧壁间隔物形成在间隔开的线的相对侧上。 这些线的个体具有比在紧邻线之间的紧邻的间隔物之间​​的最小宽度的最大宽度。 去除间隔的线以在间隔件之间形成一系列交替的第一和第二掩模开口。 第一掩模开口位于间隔开的线的位置并且比第二掩模开口更宽。 交替的第一和第二沟槽分别通过交替的第一和第二掩模开口同时蚀刻到衬底中,以形成比第二沟槽在衬底内更宽和更深的第一沟槽。 公开了其他实现和实施例。

    Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
    2.
    发明授权
    Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate 有权
    形成存储单元阵列的方法,形成多个场效应晶体管的方法,形成源极/漏极区域和隔离沟槽的方法以及将一系列间隔开的沟槽形成衬底的方法

    公开(公告)号:US08039340B2

    公开(公告)日:2011-10-18

    申请号:US12720322

    申请日:2010-03-09

    IPC分类号: H01L21/8238

    摘要: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.

    摘要翻译: 将一系列间隔开的沟槽形成到衬底中的方法包括在衬底上形成多个间隔开的线。 各向异性蚀刻的侧壁间隔物形成在间隔开的线的相对侧上。 这些线的个体具有比在紧邻线之间的紧邻的间隔物之间​​的最小宽度的最大宽度。 去除间隔的线以在间隔件之间形成一系列交替的第一和第二掩模开口。 第一掩模开口位于间隔开的线的位置并且比第二掩模开口更宽。 交替的第一和第二沟槽分别通过交替的第一和第二掩模开口同时蚀刻到衬底中,以形成比第二沟槽在衬底内更宽和更深的第一沟槽。 公开了其他实现和实施例。

    METHODS OF FORMING AN ARRAY OF MEMORY CELLS, METHODS OF FORMING A PLURALITY OF FIELD EFFECT TRANSISTORS, METHODS OF FORMING SOURCE/DRAIN REGIONS AND ISOLATION TRENCHES, AND METHODS OF FORMING A SERIES OF SPACED TRENCHES INTO A SUBSTRATE
    3.
    发明申请
    METHODS OF FORMING AN ARRAY OF MEMORY CELLS, METHODS OF FORMING A PLURALITY OF FIELD EFFECT TRANSISTORS, METHODS OF FORMING SOURCE/DRAIN REGIONS AND ISOLATION TRENCHES, AND METHODS OF FORMING A SERIES OF SPACED TRENCHES INTO A SUBSTRATE 有权
    形成记忆体阵列的方法,形成多个场效应晶体管的方法,形成源/漏区域和分离条件的方法,以及将一系列间隔开的基底形成基底的方法

    公开(公告)号:US20110223734A1

    公开(公告)日:2011-09-15

    申请号:US12720322

    申请日:2010-03-09

    IPC分类号: H01L21/8234 H01L21/302

    摘要: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.

    摘要翻译: 将一系列间隔开的沟槽形成到衬底中的方法包括在衬底上形成多个间隔开的线。 各向异性蚀刻的侧壁间隔物形成在间隔开的线的相对侧上。 这些线的个体具有比在紧邻线之间的紧邻的间隔物之间​​的最小宽度的最大宽度。 去除间隔的线以在间隔件之间形成一系列交替的第一和第二掩模开口。 第一掩模开口位于间隔开的线的位置并且比第二掩模开口更宽。 交替的第一和第二沟槽分别通过交替的第一和第二掩模开口同时蚀刻到衬底中,以形成比第二沟槽在衬底内更宽和更深的第一沟槽。 公开了其他实现和实施例。

    Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate
    4.
    发明申请
    Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate 有权
    形成记忆体阵列的方法,形成多个场效应晶体管的方法,形成源极/漏极区域的方法和隔离沟槽以及将一系列间距沟槽形成基板的方法

    公开(公告)号:US20130005115A1

    公开(公告)日:2013-01-03

    申请号:US13611517

    申请日:2012-09-12

    IPC分类号: H01L21/762 H01L21/308

    摘要: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.

    摘要翻译: 将一系列间隔开的沟槽形成到衬底中的方法包括在衬底上形成多个间隔开的线。 各向异性蚀刻的侧壁间隔物形成在间隔开的线的相对侧上。 这些线的个体具有比在紧邻线之间的紧邻的间隔物之间​​的最小宽度的最大宽度。 去除间隔的线以在间隔件之间形成一系列交替的第一和第二掩模开口。 第一掩模开口位于间隔开的线的位置并且比第二掩模开口更宽。 交替的第一和第二沟槽分别通过交替的第一和第二掩模开口同时蚀刻到衬底中,以形成比第二沟槽在衬底内更宽和更深的第一沟槽。 公开了其他实现和实施例。

    Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
    6.
    发明授权
    Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate 有权
    形成存储单元阵列的方法,形成多个场效应晶体管的方法,形成源极/漏极区域和隔离沟槽的方法以及将一系列间隔开的沟槽形成衬底的方法

    公开(公告)号:US08389353B2

    公开(公告)日:2013-03-05

    申请号:US13248791

    申请日:2011-09-29

    IPC分类号: H01L21/8238

    摘要: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.

    摘要翻译: 将一系列间隔开的沟槽形成到衬底中的方法包括在衬底上形成多个间隔开的线。 各向异性蚀刻的侧壁间隔物形成在间隔开的线的相对侧上。 这些线的个体具有比在紧邻线之间的紧邻的间隔物之间​​的最小宽度的最大宽度。 去除间隔的线以在间隔件之间形成一系列交替的第一和第二掩模开口。 第一掩模开口位于间隔开的线的位置并且比第二掩模开口更宽。 交替的第一和第二沟槽分别通过交替的第一和第二掩模开口同时蚀刻到衬底中,以形成比第二沟槽在衬底内更宽和更深的第一沟槽。 公开了其他实现和实施例。

    Methods of forming semiconductor constructions
    7.
    发明授权
    Methods of forming semiconductor constructions 有权
    形成半导体结构的方法

    公开(公告)号:US08741781B2

    公开(公告)日:2014-06-03

    申请号:US13529006

    申请日:2012-06-21

    IPC分类号: H01L21/461

    摘要: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.

    摘要翻译: 一些实施例包括具有主要沿着第一方向延伸的一对线并且在线之间具有一对接触的半导体结构。 触点通过光刻尺寸彼此间隔开,并且通过亚光刻尺寸与线间隔开。 一些实施例包括形成半导体结构的方法。 特征形成在一个基地上。 每个特征具有第一类型侧壁和第二类型侧壁。 这些特征通过间隙彼此间隔开。 一些间隙是第一类型侧壁之间的第一类型间隙,而其它间隙是第二类型侧壁之间的第二类型间隙。 形成掩模材料以相对于第二类型间隙选择性地填充第一类型的间隙。 去除过量的掩模材料以留下图案化掩模。 图案从图案化掩模转移到基底中。

    Methods of Forming Semiconductor Constructions
    8.
    发明申请
    Methods of Forming Semiconductor Constructions 有权
    形成半导体结构的方法

    公开(公告)号:US20130341795A1

    公开(公告)日:2013-12-26

    申请号:US13529006

    申请日:2012-06-21

    摘要: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.

    摘要翻译: 一些实施例包括具有主要沿着第一方向延伸的一对线并且在线之间具有一对接触的半导体结构。 触点通过光刻尺寸彼此间隔开,并且通过亚光刻尺寸与线间隔开。 一些实施例包括形成半导体结构的方法。 特征形成在一个基地上。 每个特征具有第一类型侧壁和第二类型侧壁。 这些特征通过间隙彼此间隔开。 一些间隙是第一类型侧壁之间的第一类型间隙,而其它间隙是第二类型侧壁之间的第二类型间隙。 形成掩模材料以相对于第二类型间隙选择性地填充第一类型的间隙。 去除过量的掩模材料以留下图案化掩模。 图案从图案化掩模转移到基底中。