-
公开(公告)号：US5918221A
公开(公告)日：1999-06-29
申请号：US638370
申请日：1996-04-26
CPC分类号： G06N7/043
摘要： The analog processor can carry out processings independently of the operating temperature and process parameters, in a reliable manner and at high performance levels using fairly simple circuitry. To achieve this independence, the processor is basically implemented and integrated with MOS transistors, has both voltage inputs and outputs, and includes a biasing section which supplies voltage bias signals, of which at least one is substantially the sum of a voltage proportional to the threshold voltage of the MOS transistors and a reference voltage. This reference voltage can be extracted from a reference potential which is stable to temperature and process parameters, for example that produced by a bandgap type of generator. A major feature of the processor according to the invention is the linearity of its input-output characteristic relative to that reference voltage. It follows that it may be advantageous to extract that reference voltage by division from a signal indicating the width of the input signal variation range, thereby to achieve compensation for or independence of variations of this range.
摘要翻译： 模拟处理器可以使用相当简单的电路以可靠的方式和高性能水平独立于工作温度和工艺参数进行处理。 为了实现这种独立性，处理器基本上实现并与MOS晶体管集成，具有电压输入和输出，并且包括提供电压偏置信号的偏置部分，其中至少一个基本上是与阈值成比例的电压之和 MOS晶体管的电压和参考电压。 可以从对温度和工艺参数稳定的参考电位提取该参考电压，例如由带隙型发生器产生的参考电压。 根据本发明的处理器的主要特征是其输入 - 输出特性相对于该参考电压的线性。 因此，从指示输入信号变化范围的宽度的信号中分离提取参考电压可能是有利的，从而实现对该范围的变化的补偿或独立性。
-
公开(公告)号：US06301570B1
公开(公告)日：2001-10-09
申请号：US08638371
申请日：1996-04-26
IPC分类号： G06N702
摘要： The analog processor of this invention is programmable and capable of storing the processing coefficients in analog form. It comprises a storage section having at least one output, plural outputs in most cases, and being adapted to respectively generate programming signals on such outputs; the storage section is input a plurality of supply voltage signals and is operative to produce, in connection with information stored therein, one of the supply voltage signals on each of the outputs, it being understood that one voltage signal may be produced on several such outputs. Advantageously, the processor can also be programmed in a simple manner from circuits of the digital type if switches controlled by storage elements are used in the storage section.
摘要翻译： 本发明的模拟处理器是可编程的并且能够以模拟形式存储处理系数。 它包括具有至少一个输出的存储部分，在大多数情况下多个输出，并且适于在这种输出上分别产生编程信号; 存储部分输入多个电源电压信号，并且可操作地结合存储在其中的信息来产生每个输出上的电源电压信号中的一个，应当理解，可以在几个这样的输出上产生一个电压信号 。 有利地，如果在存储部分中使用由存储元件控制的开关，则处理器也可以以简单的方式从数字类型的电路编程。
-
公开(公告)号：US5680179A
公开(公告)日：1997-10-21
申请号：US534000
申请日：1995-09-27
CPC分类号： H04N9/646 , H04N5/21 , H03H2222/02
摘要： A device for filtering video images, of the type which includes first and second circuit portions, each having first and second input terminals respectively adapted to receive digitalized luminance and chrominance components of a television signal, and an output terminal coinciding with an output terminal of the device. The first and second circuit portions further include first, second and third filters, cascade coupled to one another, and a fourth filter, respectively. The first, second and third filters incorporate a computational circuit which uses a logic of the fuzzy type to process the digitalized luminance component. The fourth filter includes a computational circuit which processes the digitalized chrominance components based upon a parameter supplied from the second filter.
摘要翻译： 一种用于对包括第一和第二电路部分的类型的视频图像进行滤波的装置，每个具有分别适于接收电视信号的数字化亮度和色度分量的第一和第二输入端子，以及与输出端子重合的输出端子 设备。 第一和第二电路部分还包括分别彼此耦合的级联和第四滤波器的第一，第二和第三滤波器。 第一，第二和第三滤波器包括使用模糊类型的逻辑来处理数字化亮度分量的计算电路。 第四滤波器包括基于从第二滤波器提供的参数来处理数字化色度分量的计算电路。
-
4.发明授权Video images decoder architecture for implementing a 40 MS processing algorithm in high definition television 失效用于在高分辨率电视中实现40MS处理算法的视频图像解码器架构
公开(公告)号：US5459519A
公开(公告)日：1995-10-17
申请号：US241604
申请日：1994-05-11
申请人： Fabio Scalise , Rinaldo Poluzzi
发明人： Fabio Scalise , Rinaldo Poluzzi
CPC分类号： H04N7/0155
摘要： A video image decoder architecture for implementing a processing algorithm in the 40-ms mode on high-resolution TV sets, of a kind adapted to handle TV signals being received on respective transmission channels (J,L), which comprises a video signal demultiplexer receiving the transmission channels (J,L); and respective processing blocks for separately handling the signals from each of the channels (J,L). Each processing block includes a video image format converter, a local memory connected to an output of the converter, and at least one median filter and one systolic filter cascade connected after the memory for restoring, by interpolation, signal samples related to successive lines of the video image. A summing node adds the outputs from each processing block so as to obtain a time mean between restored samples of the channels (J,L). This architecture drastically reduces the number of memories required for processing the restored algorithm, as well as reducing overall silicon area requirements for the system. Accordingly, the whole 40-millisecond processing portion may be integrated into a single chip.
摘要翻译： 一种用于在高分辨率电视机上实现40ms模式的处理算法的视频图像解码器架构，其适用于处理在各个传输信道（J，L）上接收的TV信号，其包括视频信号解复用器接收 传输通道（J，L）; 以及用于分别处理来自每个通道（J，L）的信号的各个处理块。 每个处理块包括视频图像格式转换器，连接到转换器的输出的本地存储器，以及连接在存储器之后的至少一个中值滤波器和一个收缩滤波器级联，用于通过内插来恢复与相关行的相关行相关的信号样本 视频图像。 求和节点将来自每个处理块的输出相加以获得恢复的信道样本（J，L）之间的时间平均值。 这种架构大大减少了处理恢复的算法所需的存储器数量，并减少了系统的整体硅面积要求。 因此，整个40毫秒处理部分可以集成到单个芯片中。
-
公开(公告)号：US5053984A
公开(公告)日：1991-10-01
申请号：US440021
申请日：1989-11-21
IPC分类号： H03H17/02
CPC分类号： H03H17/0294
摘要： The filter includes an arithmetical chain of parallel adders alternated with delay elements, and a memory constituted by lines of one-bit cells. Each line is addressable by a decoder controlled by a digital signal to be filtered; each line of memory contains side by side values which correspond to the partial products of successive impulse-response coefficients for a value equal to the line address. The memory additionally includes a number of read amplifiers. The number of read amplifiers is equal to the number of cells of one line in order to read the bits of the addressed. The outputs of the amplifiers are connected to respective parallel inputs of the adders of the arithmetical chain. Each memory line contains these values in two's-complement binary form in words which decrease in length by one bit for each increment of 2 in the characteristic of the coefficients, starting from the one of lowest characteristic. The output of each read amplifier corresponding to the most significant bit of each value is connected to the corresponding input bit line of the associated adder and to all the other most significant input bit lines.
摘要翻译： 滤波器包括与延迟元件交替的并行加法器的算术链，以及由一位单元的行构成的存储器。 每行可由被要滤波的数字信号控制的解码器寻址; 存储器的每一行包含对应于等于行地址的值的连续脉冲响应系数的部分乘积的并行值。 存储器还包括多个读取放大器。 读取放大器的数量等于一行的单元数，以便读取寻址的位。 放大器的输出端连接到算术链的加法器的相应并行输入端。 每个存储线包含两个补码二进制形式的这些值，它们以从最低特性之一开始的系数特性中的每个增量2减少一位的长度减去一位。 与每个值的最高有效位相对应的每个读取放大器的输出连接到相关联的加法器的相应输入位线和所有其他最重要的输入位线。
-
6.发明授权Post-processing method for reducing artifacts in block-coded digital images, and post-processing device for actuating such method 失效用于减少块编码数字图像中的伪影的后处理方法，以及用于致动这种方法的后处理装置公开(公告)号：US07373014B1
公开(公告)日：2008-05-13
申请号：US09087671
申请日：1998-05-29
申请人： Massimo Mancuso , Rinaldo Poluzzi
发明人： Massimo Mancuso , Rinaldo Poluzzi
IPC分类号： G06K9/40
CPC分类号： H04N19/527 , H04N19/86
摘要： A post-processing method reduces artifacts in block-coded digital images. The method includes: dividing an input image into a plurality of image blocks; for each image block, estimating global features of said image block providing information on an average content of image edges along the horizontal and vertical directions of said image block; for each pixel of an image block under examination, estimating local features for said pixel providing information on the content of image edges along the horizontal and vertical directions of an image area near said pixel; modifying the value of said pixel according to both said global features of the image block to which said pixel belongs and said local features of the image area near said pixel.
摘要翻译： 后处理方法减少块编码数字图像中的伪像。 该方法包括：将输入图像分割成多个图像块; 对于每个图像块，估计所述图像块的全局特征，提供关于沿着所述图像块的水平和垂直方向的图像边缘的平均内容的信息; 对于所检查的图像块的每个像素，估计所述像素的局部特征，提供关于沿所述像素附近的图像区域的水平和垂直方向的图像边缘的内容的信息; 根据所述像素所属的图像块的所述全局特征和所述像素附近的图像区域的所述局部特征来修改所述像素的值。
-
7.发明申请Device and method for filtering electrical signals, in particular acoustic signals 有权滤波电信号，特别是声信号的装置和方法公开(公告)号：US20050033786A1
公开(公告)日：2005-02-10
申请号：US10650450
申请日：2003-08-27
申请人： Rinaldo Poluzzi , Alberto Savi , Giuseppe Martina , Davide Vago
发明人： Rinaldo Poluzzi , Alberto Savi , Giuseppe Martina , Davide Vago
CPC分类号： H04R3/005 , H04R25/407 , H04R25/507 , H04R2225/41 , H04R2410/05
摘要： A device for filtering electrical signals has a number of inputs arranged spatially at a distance from one another and supplying respective pluralities of input signal samples. A number of signal processing channels, each formed by a neuro-fuzzy filter, receive a respective plurality of input signal samples and generate a respective plurality of reconstructed samples. An adder receives the pluralities of reconstructed samples and adds them up, supplying a plurality of filtered signal samples. In this way, noise components are shorted. When activated by an acoustic scenario change recognition unit, a training unit calculates the weights of the neuro-fuzzy filters, optimizing them with respect to the existing noise.
摘要翻译： 用于滤波电信号的装置具有在空间上彼此间隔设置的多个输入，并且提供相应的多个输入信号采样。 由神经 - 模糊滤波器形成的多个信号处理通道接收相应的多个输入信号采样并产生相应的多个重构采样。 加法器接收多个重构样本并将其相加，提供多个滤波信号采样。 以这种方式，噪声分量被短路。 当由声学场景变化识别单元激活时，训练单元计算神经 - 模糊滤波器的权重，并相对于现有噪声进行优化。
-
公开(公告)号：US06332136B1
公开(公告)日：2001-12-18
申请号：US08987357
申请日：1997-12-09
IPC分类号： G06N702
CPC分类号： H03H17/0261 , H03H2222/02
摘要： The fuzzy filtering of a noise signal comprising a plurality of signal samples [s(t,k)] is carried out using as variables the variation of the signal in the considered window and the distance of the samples from a sample to be reconstructed, to distinguish the typical variations of the original signal from those due to the noise and to identify the signal fronts. The method comprises the steps of defining a current signal sample [s(t)] from among the plurality of signal samples, calculating a plurality of difference samples [D(t,k)] as the difference in absolute value between the current signal sample and each signal sample and defining distance values (k) between the current signal sample and each signal sample. The method further comprises determining weight parameters [P(k)] on the basis of the difference samples and the distance values by means of fuzzy logic and weighing the signal samples with the weight parameters so as to obtain a reconstructed signal sample [o(t)].
摘要翻译： 包括多个信号样本[s（t，k）]的噪声信号的模糊滤波使用所考虑的窗口中的信号的变化和样本从待重建的样本的距离变为 将原始信号的典型变化与由于噪声引起的信号进行区分，并识别信号前沿。 该方法包括以下步骤：从多个信号样本中定义当前信号样本[s（t）]，计算多个差分样本[D（t，k）]作为当前信号样本之间的绝对值差 和每个信号样本并定义当前信号样本与每个信号样本之间的距离值（k）。 该方法还包括通过模糊逻辑基于差分样本和距离值确定权重参数[P（k）]，并用权重参数对信号样本进行加权，以便获得重构信号样本[o（t ）]。
-
公开(公告)号：US6034741A
公开(公告)日：2000-03-07
申请号：US558596
申请日：1995-10-30
CPC分类号： G06T5/20 , H03H2222/02
摘要： A filter performs a reduction of pulsed noise in video images in accordance with fuzzy logic. An interface circuit of the filter receives consecutive digital signals in time corresponding to the video images and generates an image window having a digital signal to be processed at the center. The filter also has a comparator block, a plurality of digital subtractors, and a memory circuit connected in cascade to the comparator block. The filter also has a filtering circuit that organizes values of digital signals of the video image, and an arithmetic block that performs a switch between the digital signal to be processed and the output of the filtering circuit on the basis of the values taken by the parameter.
摘要翻译： 滤波器根据模糊逻辑执行视频图像中的脉冲噪声的降低。 滤波器的接口电路在对应于视频图像的时间中接收连续的数字信号，并产生具有要在中心处理的数字信号的图像窗口。 滤波器还具有比较器块，多个数字减法器和与比较器块级联连接的存储器电路。 滤波器还具有组合视频图像的数字信号的值的滤波电路，以及基于由参数取得的值执行要处理的数字信号和滤波电路的输出之间的切换的运算块 。
-
10.发明授权Edge-oriented intra-field/inter-field interpolation filter for improved quality video appliances 失效面向边缘的场内/场间插值滤波器，用于改进质量的视频设备
公开(公告)号：US5929918A
公开(公告)日：1999-07-27
申请号：US801950
申请日：1997-02-12
CPC分类号： H04N7/012 , H04N7/0132
摘要： An interpolation filter for video signals includes four circuits to improve video quality in both intra-field and inter-field modes. The interpolation filter is configured to interpolate according to the direction of an image edge. The interpolation filter is also configured to interpolate in a prescribed spatial direction when no image edges can be univocally determined. The first circuit detects an image edge of discrete image elements to generate a first signal. The second circuit uses output from the first circuit to generate a first signal corresponding to an average of the discrete image elements along a direction of the image edge. The third circuit uses output from the first circuit to detect a texture image area wherein an image edge cannot be univocally determined and for generating a second signal depending on a degree of existence of the image edge. The fourth circuit is supplied by the first signal, the second signal and a third signal. The fourth circuit generates an output signal obtained by combining the first signal with the third signal in a proportion dependent upon the second signal. Additionally, the fourth circuit is configured for multiplexing to selectively couple the third signal to a fourth signal, corresponding to an average of the discrete image elements along a prescribed direction, or to a fifth signal corresponding to a previously received image element value.
摘要翻译： 用于视频信号的内插滤波器包括四个电路，以改善场内和场外模式中的视频质量。 内插滤波器被配置为根据图像边缘的方向进行插值。 内插滤波器也被配置为当不能确定图像边缘时，在规定的空间方向内插。 第一电路检测离散图像元素的图像边缘以产生第一信号。 第二电路使用来自第一电路的输出来产生对应于沿着图像边缘的方向的离散图像元素的平均值的第一信号。 第三电路使用来自第一电路的输出来检测纹理图像区域，其中图像边缘不能被单一地确定，并且用于根据图像边缘的存在程度产生第二信号。 第四电路由第一信号，第二信号和第三信号提供。 第四电路产生通过将第一信号与第三信号以取决于第二信号的比例组合而获得的输出信号。 此外，第四电路被配置为用于多路复用以选择性地将第三信号耦合到对应于沿着规定方向的离散图像元素的平均值的第四信号，或者对应于先前接收到的图像元素值的第五信号。
-
-
-
-
-
-
-
-
-
搜索结果
34 条记录 (耗时 0.023 秒)
